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DS20006554A bảng dữ liệu(PDF) 79 Page - Microchip Technology

tên linh kiện DS20006554A
Giải thích chi tiết về linh kiện  1-APLL, 6- or 10-Output Any-to-Any Clock Multiplier and Frequency Synthesizer
PDF  94 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
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ZL30260-ZL30263
Data Sheet
79
© 2021 Microchip Technology Inc.
DS20006554A
Figure 15 - Example External Components for Differential Input Signals
Figure 16 - Electrical Characteristics: Differential Clock Outputs
Table 10 - Electrical Characteristics: LVDS Clock Outputs
VDDOx=VDDH=3.3V±5% or VDDOx=VDDH=2.5V±5% for LVDS operation.
Characteristics
Symbol
Min.
Typ.
Max.
Units
Notes
Output frequency
fOCD
1045
MHz
Output common-mode voltage
VCM
1.13
1.2
1.37
V
Note 1. See Figure 16
Output differential voltage
VOD
310
420
530
mV
Note 1. See Figure 16
Output differential swing, peak-to-peak
VOD,PP
620
840
1060
mVPP
Note 1. See Figure 16
Output rise/fall time
tR, tF
150
ps
20%-80%
Output duty cycle
45
50
55
%
Note 1:
OCxCR2.OCSF=0001 (LVDS). Output must have 100
 DC path between OUTxP and OUTxN to meet these V
OD specs. See Figure
17 parts a) and b) for examples where this DC path is a 100
 termination resistor at the receiver.
Signal
Driver
50
50
100
Receiver
+
-
Driver-
specified
termination
network
LVDS
Example termination networks:
R1
R1
R2
R2
LVPECL
VDD_driver=3.3V: R1=127
, R2=82
VDD_driver=2.5V: R1=250
, R2=62.5
CML
50
50
VDD_driver
VDD_driver
VDD_driver
50
50
HCSL
DC
bias
Signal
Driver
50
50
Receiver
+
-
Driver-
specified
DC
network
Place the 100
 termination resistor as close as possible
to the device pins.
VDD_driver
DC
bias
100
Consult the signal driver’s data sheet for any required
DC network for this arrangement where the termination
resistor is on the receiver side of the AC coupling caps.
LVPECL drivers often need resistors (typically <200
) to
ground in the DC network.
VOCxP
VOCxN
VOD
1/fOCD
VOH
VOL
VCM
VOCxP - VOCxN
0
VOD,PP
Microchip
Microchip



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