EMC2302 datasheet(48/70 Pages) MICROCHIP

48 / 70 page

EMC2301/2/3/5

DS20006532A-page 48

 2021 Microchip Technology Inc.

SOFTWARE LOCK - SOFTWARE LOCK REGISTER (ADDRESS EFH)

U-0

RW-0

—

LOCK

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-1

Unimplemented bit, read as ‘0’.

bit 0

LOCK: Enables the SWL function

1 = All SWL registers are locked and read-only. Unlock occurs on power cycle.

0 = All SWL registers are writable.

PROD FEAT - EMC2303/5 PRODUCT FEATURES REGISTER (ADDRESS FCH)

U-0

R-0

—

ADR[2:0]

FSP[2:0]

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-6

Unimplemented bit, read as ‘0’.

bit 5-3

ADR[2:0]: SMBus address determined by the ADDR_SEL pin decode.

101 = 1001_101(r/w)

100 = 1001_100(r/w)

011 = 0101_101(r/w)

010 = 0101_100(r/w)

001 = 0101_111(r/w)

000 = 0101_110(r/w)

bit 2-0

FSP[2:0]: Default Fan Speed determined by the CLK pin decode. This is conditional on ADDR_SEL.

100 = 100% PWM

011 = 75% PWM

010 = 50% PWM

001 = 30% PWM

000 = 0% PWM

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