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DSPIC33EP128GS708 bảng dữ liệu(PDF) 66 Page - Microchip Technology

tên linh kiện DSPIC33EP128GS708
Giải thích chi tiết về linh kiện  16-Bit Digital Signal Controllers for Digital Power Applications with Interconnected High-Speed PWM, ADC, PGA and Comparators
PDF  484 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
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dsPIC33EPXXXGS70X/80X FAMILY
DS70005258C-page 66
 2016-2018 Microchip Technology Inc.
5.6
Control Registers
Five SFRs are used to write and erase the Program
Flash Memory: NVMCON, NVMKEY, NVMADR,
NVMADRU and NVMSRCADR/H.
The NVMCON register (Register 5-1) selects the
operation to be performed (page erase, word/row
program, Inactive Partition erase), initiates the program
or erase cycle and is used to determine the Active
Partition in Dual Partition modes.
NVMKEY (Register 5-4) is a write-only register that is
used for write protection. To start a programming or
erase
sequence,
the
user
application
must
consecutively write 0x55 and 0xAA to the NVMKEY
register.
There are two NVM Address registers: NVMADRU and
NVMADR. These two registers, when concatenated,
form the 24-bit Effective Address (EA) of the selected
word/row for programming operations, or the selected
page for erase operations. The NVMADRU register is
used to hold the upper eight bits of the EA, while the
NVMADR register is used to hold the lower 16 bits of
the EA.
For row programming operation, data to be written to
Program Flash Memory is written into data memory
space (RAM) at an address defined by the
NVMSRCADR register (location of first element in row
programming data).



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