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DSPIC33EP128GS708 bảng dữ liệu(PDF) 279 Page - Microchip Technology

tên linh kiện DSPIC33EP128GS708
Giải thích chi tiết về linh kiện  16-Bit Digital Signal Controllers for Digital Power Applications with Interconnected High-Speed PWM, ADC, PGA and Comparators
PDF  484 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DSPIC33EP128GS708 bảng dữ liệu(HTML) 279 Page - Microchip Technology

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 2016-2018 Microchip Technology Inc.
DS70005258C-page 279
dsPIC33EPXXXGS70X/80X FAMILY
FIGURE 22-2:
DEDICATED ADC CORES 0 TO 3 BLOCK DIAGRAM
FIGURE 22-3:
SHARED ADC CORE BLOCK DIAGRAM
Note 1: The DIFFx bit for the corresponding positive input channel must be set in order to use the negative differential input.
Sample-
and-Hold
12-Bit SAR
ADC
Selection
(DIFFx)(1)
Positive Input
Alternate
Positive Input
AVSS
+
–
ADC Core
Clock Divider
Reference
Output Data
Clock
Trigger Stops
Sampling
Negative Input
Negative Input
PGAx
Positive Input
Selection
(CxCHS<1:0>)
(ADCS<6:0> bits)
Shared
Sample-
and-Hold
AN4
AN21
+
Analog Channel Number
from Current Trigger
12-Bit
SAR
ADC Core
Clock Divider
Reference
Clock
Output Data
Sampling Time
(SHRADC<6:0> bits)
ADC
SHRSAMC<9:0>
Selection
(DIFFx)(1)
AVSS
–
AN9(1)
Negative Input
Note 1: Differential-mode conversion is not available for the shared ADC core in dsPIC33EPXXGS70X/80X
devices. For all other devices, the DIFFx bit for the corresponding positive input channel must be set to use
AN9 as the negative differential input.



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