68HC05JB4 datasheet(93/134 Pages) FREESCALE

93 / 134 page

February 24, 1999

GENERAL RELEASE SPECIFICATION

MC68HC05JB4

UNIVERSAL SERIAL BUS MODULE

MOTOROLA

REV 2

10-27

a SETUP interrupt are shown in Figure 10-30.

10.6.1.2 Transmit Control Endpoint 0

For a Control IN transaction directed at Endpoint 0, the USB module will generate

an interrupt by setting the TXD0F ﬂag in the UIR0 register. The conditions

necessary for the interrupt to occur are shown in the ﬂowchart of Figure 10-31.

10.6.1.3 Transmit Endpoint 1 and Transmit Endpoint 2

Transmit Endpoints 1 & 2 share their interrupt ﬂag. For an IN transaction directed

at Endpoint 1 or 2, the USB module will generate an interrupt by setting the

TXD1F ﬂag in the UIR1 register. The conditions necessary for the interrupt to

occur are shown in the ﬂowchart of Figure 10-32.

10.6.2 Resume Interrupt

The USB module will generate a USB interrupt if low speed bus activity is

detected after entering the suspend state. A transition of the USB data lines to the

non-idle state (“K” state) while in the suspend mode will set the RESUMF ﬂag in

the UIR1 register. There is no interrupt enable bit for this interrupt source and an

interrupt will be executed if the I bit in the CCR is cleared. A resume interrupt can

only occur while the MC68HC05JB4 is in the suspend mode.

10.6.3 End of Packet Interrupt

The USB module can generate a USB interrupt upon detection of an end of

packet signal (a single ended 0) for low speed devices. Upon detection of an SE0

sequence, the USB module sets the EOPF bit and will generate an interrupt if the

EOPIE bit in the UIR1 register is set.

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