STV82X8 datasheet(56/157 Pages) STMICROELECTRONICS

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STV82x8

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I2S_SYNC_OFFSET

I²S Synchronization Offset Frequency Register

12.4

Clocking 1

A low-jitter PLL Clock is integrated and can be fully reprogrammed using the registers described

below. By default, the programming is defined for a 27-MHz crystal oscillator, which is the frequency

recommended for reducing potential RF interference in the application. However, if necessary, the

PLL Clock can be re-programmed for other crystal oscillator frequencies within a range from 23 to

30 MHz. Other crystal frequencies can be programmed on your demand.

Note:

A Crystal Frequency change is compatible with other default I²C programming including the built-in

Automatic Standard Recognition System.

SYS_CONFIG

System Configuration Control Register

Address: 06h

Type: R/W

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

I2S_SFO[7:0]

Bit Name

Reset

Function

I2S_SFO[7:0]

0000

I²S synchronization frequency offset (±450 ppm full scale)

Address: 07h

Type: R/W

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

SYNC_PLL

OPEN_PLL

INPUT_FREQ[3:0]

BIT[1:0]

Bit Name

Reset

Function

SYNC_PLL

Status of the loop wyth the synthesizer

0: Open

1: Closed

OPEN_PLL

Force the loop with the synthesizer to be open

0: No Action

1: Loop Open

INPUT_FREQ[3:0]

0010

I2S Input frequency

0010: 48 kHz

BIT[1:0]

Reserved

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