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MCP3565RT-E/SFX bảng dữ liệu(PDF) 52 Page - Microchip Technology

tên linh kiện MCP3565RT-E/SFX
Giải thích chi tiết về linh kiện  Two-Channel, 153.6 ksps, Low Noise 24-Bit Delta-Sigma ADC with Internal Voltage Reference
PDF  108 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
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MCP3565RT-E/SFX bảng dữ liệu(HTML) 52 Page - Microchip Technology

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MCP3565R
DS20006401C-page 52
2020-2021 Microchip Technology Inc.
5.11 ADC Start-up Timer
The device includes an intelligent start-up timer circuit
for the ADC, which ensures that the ADC is properly
biased and that internal nodes are properly settled
before each conversion. This timer ensures the proper
conditions for the ADC to convert with its full accuracy
for each conversion.
The ADC can operate in three different modes: ADC
Shutdown, Standby and Conversion, as described in
Section 5.9 “ADC Operating Modes”. The ADC
start-up timer manages the time for the transitions
between each mode. These transitions can be
instantaneous or can take a maximum of 256 DMCLK
periods, depending on the type of transition and the
current status of the ADC and of the internal start-up timer.
The timer will always try to reduce the transition time
from one state to another, but will also allow enough
time for the internal circuitry to settle to the proper
internal operating points.
The transitions from Standby or Conversion mode to
ADC Shutdown mode are always immediate. They
reset the internal start-up timer to 256 DMCLK periods
(TADC_SETUP).
The transitions from ADC Shutdown to Standby or
Conversion mode start the internal start-up timer that
decrements from 256 to 0. The timer only decrements
after a small delay of two MCLK periods in case of a
transition caused by an SPI command. This small delay
is necessary to overcome any possible synchronization
issue between the two asynchronous clocks: MCLK
and SCK. The timer will immediately decrement
(without the synchronization delay) if the transitions are
generated by the internal state machine (for example,
when the transitions are generated by the Scan
sequence). Once the timer reaches 0 (when the user
has clocked 256 DMCLK periods), the device reaches
its internal proper operating points and will either stay
in Standby mode (if ADC_MODE[1:0] = 10) or start the
Conversion mode (if ADC_MODE[1:0] = 11).
The transition from Standby to Conversion mode and
vice versa is immediate once the timer has reached 0 (if
ADC_MODE[1:0] = 11). If the transition from Standby to
Conversion mode occurs, and if the timer has not yet
reached 0, the timer will continue to decrement to 0
before effectively starting the conversion. The timer
cannot decrement faster than 256 DMCLK periods when
the ADC transitions from ADC Shutdown mode to
Conversion mode (from ADC Shutdown mode, the ADC
is allowed 256 DMCLK periods to power-up and settle to
its desired operating point before starting conversions).
The start-up time has been sized at 256 DMCLK clock
periods for the part to be able to settle in all conditions
and with all possible clock frequencies as specified.
Table 5-12 summarizes the behavior of the internal
start-up timer as a function of the ADC_MODE[1:0] bits
setting.
Rewriting the ADC_MODE[1:0] bits without changing
the bit settings does not modify the internal timer and
cannot shorten the start-up delay necessary to start
accurate conversions. A synchronization delay of
two MCLK periods occurs after each rewrite if
ADC_MODE[1:0] = 1x.
In Scan mode, when CONV_MODE[1:0] = 11 (Contin-
uous mode), the ADC may be placed in ADC Shutdown
mode and restarted in between each Scan cycle
depending on the TIMER[23:0] bits setting (see
Section 5.15.5 “Delay Between Scan Cycles
(TIMER[23:0])”). If the TIMER register is programmed
with a decimal code greater than TADC_SETUP = 256,
the internal timer will automatically place the part in
ADC Shutdown mode at the end of the cycle and will
start to transition to the next cycle 256 DMCLK periods
before the end of the timer delay.
This lowers the power consumed during the timer delay
as much as possible. If the value of the timer delay is less
than 256 DMCLK periods, the part will not enter ADC
Shutdown mode and will stay in Standby during the timer
delay (in this case, the power consumed is equivalent to
the Conversion mode power consumption).
Figure 5-11 shows different cases of transitions
between modes and shows the internal state of the
start-up timer for each step.
TABLE 5-12: ADC START-UP TIMER BEHAVIOR AS A FUNCTION OF ADC_MODE[1:0] SETTINGS
ADC_MODE[1:0]
ADC State
ADC Start-up Timer Behavior
11
Conversion
The ADC start-up timer decrements to 0. The conversion
starts when it reaches 0.
10
Standby
The ADC start-up timer decrements to 0. The ADC is ready to
convert when it reaches 0.
0x
ADC Shutdown
ADC start-up timer is reset to TADC_SETUP = 256.



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