K32L2AX datasheet(55/96 Pages) NXP

55 / 96 page

8.3.1.1 Fast IRC (FIRC) specifications

Table 25. Fast IRC (FIRC) specifications

Symbol

Description

Min.

Typ.

Max.

Unit

Notes

Vdd_firc

Supply voltage

1.71

—

3.6

Ffirc_target

IRC target frequency (nominal)

Trim range = 00

Trim range = 01

Trim range = 10

Trim range = 11

—

MHz

Δffirc_ol_lv Open loop total deviation of FIRC frequency at low

voltage (VDD=1.71V-1.89V) over full temperature

• Regulator disable

(SCG_FIRCCSR[FIRCREGOFF]=1)

• Regulator enable

(SCG_FIRCCSR[FIRCREGOFF]=0)

—

±0.5

±1.5

%Ffirc_targ

Δffirc_ol_hv Open loop total deviation of FIRC frequency at high

voltage (VDD=1.89V-3.6V) over full temperature

Regulator enable

(SCG_FIRCCSR[FIRCREGOFF]=0)

—

±0.5

±1.5

%Ffirc_targ

2, 3

Δffirc_cl

Fine Trim Resolution

—

± 0.1

%Ffirc_targ

Jcyc_firc

Period Jitter (RMS)

—

150

Tst_firc

Startup time

—

μs

Idd_firc

Current consumption:

• 48 MHz

• 52 MHz

• 56 MHz

• 60 MHz

—

350

360

380

400

420

460

500

μA

1. FIRC trim range is programmable via SCG_FIRCCFG[RANGE].

2. For temperatures -40 to 85 °C, the maximum value is ±1%, characterized on a few samples of different slots. This

value is not guaranteed by production.

3. Closed loop operation of the FIRC is only usable for USB device operation; it is not usable for USB host operation. It is

enabled by configuring for USB Device, selecting FIRC as USB clock source, and enabling the clock recover function

(USBn_CLK_RECOVER_CTRL[CLOCK_RECOVER_EN]=1, SCG_FIRCCSR[FIRCREGOFF]=0).

4. FIRC startup time is defined as the time between clock enablement and clock availability for system use.

8.3.1.2 Slow IRC (SIRC) specifications

Table 26. Slow IRC specifications

Symbol

Description

Min.

Typ.

Max.

Unit

Notes

IDD_sirc2M

Supply current in 2 MHz mode

—

μA

Table continues on the next page...

Peripheral operating requirements and behaviors

K32 L2A Microcontroller with 512 KB Flash and 128 KB SRAM, Rev. 3, 02/2021

NXP Semiconductors

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