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PSD813F1AV-12MIT bảng dữ liệu(PDF) 33 Page - STMicroelectronics

tên linh kiện PSD813F1AV-12MIT
Giải thích chi tiết về linh kiện  Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 3.3V
PDF  110 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PSD813F1AV-12MIT bảng dữ liệu(HTML) 33 Page - STMicroelectronics

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PSD813F1V
PAGE REGISTER
The 8-bit Page Register increases the addressing
capability of the microcontroller by a factor of up to
256. The contents of the register can also be read
by the microcontroller. The outputs of the Page
Register (PGR0-PGR7) are inputs to the DPLD
decoder and can be included in the Flash Memory,
EEPROM, and SRAM chip select equations.
If memory paging is not needed, or if not all 8 page
register bits are needed for memory paging, then
these bits may be used in the CPLD for general
logic.
Figure 14 shows the Page Register. The eight flip
flops in the register are connected to the internal
data bus D0-D7. The microcontroller can write to
or read from the Page Register. The Page Regis-
ter can be accessed at address location CSIOP +
E0h.
Figure 14. Page Register
RESET
D0 - D 7
R/W
D0
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
D1
D2
D3
D4
D5
D6
D7
PAGE
REGISTER
PGR0
PGR1
PGR2
PGR3
Flash DPLD
AND
Flash CPLD
INTERNAL
SELECTS
AND LOGIC
PLD
PGR4
PGR5
PGR6
PGR7
AI09224



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