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PSD813F1AV-12MIT bảng dữ liệu(PDF) 32 Page - STMicroelectronics |
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PSD813F1AV-12MIT bảng dữ liệu(HTML) 32 Page - STMicroelectronics |
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32 / 110 page ![]() PSD813F1V 32/110 Separate Space Modes Code memory space is separated from data mem- ory space. For example, the PSEN signal is used to access the program code from the Flash Mem- ory, while the RD signal is used to access data from the EEPROM, SRAM and I/O Ports. This configuration requires the VM register to be set to 0Ch. See Figure 12. Combined Space Modes The program and data memory spaces are com- bined into one space that allows the main Flash Memory, EEPROM, and SRAM to be accessed by either PSEN or RD. For example, to configure the main Flash memory in combined space mode, bits 2 and 4 of the VM register are set to “1” (see Figure 13). Figure 12. 80C31 Memory Modes - Separate Space Figure 13. 80C31 Memory Mode - Combined Space Flash Memory DPLD EEPROM Memory SRAM RS0 EES0-EES3 FS0-FS7 CS CS CS OE OE RD PSEN OE AI09222 Flash Memory DPLD EEPROM Memory SRAM RS0 EES0-EES3 FS0-FS7 RD CS CS CS RD OE OE VM REG BIT 2 PSEN VM REG BIT 0 VM REG BIT 1 VM REG BIT 3 VM REG BIT 4 OE AI09223 |
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