ATMEGA640 datasheet(222/436 Pages) MICROCHIP

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ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET]

DS40002211A

• Bit 0 – UCPOLn: Clock Polarity

This bit is used for synchronous mode only. Write this bit to zero when asynchronous mode is used. The UCPOLn

bit sets the relationship between data output change and data input sample, and the synchronous clock (XCKn).

22.10.5

UBRRnL and UBRRnH – USART Baud Rate Registers

• Bit 15:12 – Reserved Bits

These bits are reserved for future use. For compatibility with future devices, these bit must be written to zero when

UBRRH is written.

• Bit 11:0 – UBRR11:0: USART Baud Rate Register

This is a 12-bit register which contains the USART baud rate. The UBRRH contains the four most significant bits,

and the UBRRL contains the eight least significant bits of the USART baud rate. Ongoing transmissions by the

Transmitter and Receiver will be corrupted if the baud rate is changed. Writing UBRRL will trigger an immediate

update of the baud rate prescaler.

Table 22-7.

UCSZn Bits Settings

UCSZn2

UCSZn1

UCSZn0

Character Size

000

5-bit

001

6-bit

010

7-bit

011

8-bit

100

Reserved

101

Reserved

110

Reserved

111

9-bit

Table 22-8.

UCPOLn Bit Settings

UCPOLn

Transmitted Data Changed

(Output of TxDn Pin)

Received Data Sampled

(Input on RxDn Pin)

Rising XCKn Edge

Falling XCKn Edge

Rising XCKn Edge

Bit

15141312

1110

––––

UBRR[11:8]

UBRRHn

UBRR[7:0]

UBRRLn

76543210

Read/Write

RRRR

R/W

Initial Value

00000000

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