VSC8221 datasheet(63/138 Pages) MICROSEMI

tên linh kiện	VSC8221

Giải thích chi tiết về linh kiện	Single Port 10/100/1000BASE-T PHY with1.25 Gbps SerDes for SFPs/GBICs

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63 / 138 page

VSC8221

Data Sheet

VMDS-10106 Revision 4.1

December 2006

63 of 64

22 PHY REGISTER SET CONVENTIONS

The user can control the PHY's features, operating modes, etc. by setting the PHY Registers to the desired values. The PHY

provides access to its Registers using the Serial Management interface. For details on PHY Register access, refer to Section 12

on page 33.

22.1 PHY Register Set Structure

The register access protocol, as defined by the iEEE 802.3 specification, reserves 5 bits for register addressing. This limits the

specification and registers addressed 16 through 31 are vendor specific. To provide extensive feature control of the PHY, the

vendor specific registers addressed 16 through 31 have been divided into two Page views, called PAGE0 and PAGE1, enabling

access to 32 vendor specific registers instead of 16.

PAGE0 is the default page view. To switch to PAGE1 write 0001 to PHY Register 31. To switch to PAGE0 write 0000h to PHY

Figure 23. Extended Page Register Diagram

16E

17E

18E

19E

30E

0000

0001

Normal Page

Registers

Extended Page

Registers

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