ADL9006ACGZN-R7 datasheet(6/14 Pages) AD

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ADL9006

Data Sheet

Rev. 0 | Page 6 of 14

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

GND

VGG2

GND

GND 5

RFIN

NIC

GND

18 NIC

19 NIC

RFOUT

GND

22 GND

23 NIC

24 GND

ADL9006

TOP VIEW

(Not to Scale)

NOTES

1. NIC = NO INTERNAL CONNECTION. SOLDER THE

NIC PINS TO A LOW IMPEDANCE GROUND PLANE.

2. EXPOSED PAD. THE EXPOSED PAD MUST BE

CONNECTED TO RF AND DC GROUND.

Figure 2. Pin Configuration

Table 8. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 3, 5, 8, 9, 16, 17,

20, 22, 24, 25,

GND

Ground. Solder the GND pins to a low impedance ground plane.

VGG2

Gain Control. VGG2 is dc-coupled and accomplishes gain control by reducing the internal voltage and

becoming more negative. Attach bypass capacitors to VGG2, as shown in Figure 38. Under normal

operating conditions, VGG2 is left open.

RFIN

RF Input. RFIN is ac-coupled and matched to 50 Ω.

6, 7, 10 to 15, 18,

19, 23, 26 to 30

NIC

No Internal Connection. Solder the NIC pins to a low impedance ground plane.

RFOUT

RF Output. RFOUT is ac-coupled and matched to 50 Ω.

VDD

Power Supply Voltage for the Amplifier.

EPAD

Exposed Pad. The exposed pad must be connected to RF and dc ground.

INTERFACE SCHEMATICS

RFIN

Figure 3. RFIN Interface Schematic

VGG2

Figure 4. VGG2 Interface Schematic

VDD

Figure 5. VDD Interface Schematic

RFOUT

Figure 6. RFOUT Interface Schematic

GND

Figure 7. GND Interface Schematic

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