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STM32G071C8 bảng dữ liệu(PDF) 90 Page - STMicroelectronics |
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STM32G071C8 bảng dữ liệu(HTML) 90 Page - STMicroelectronics |
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90 / 133 page ![]() Electrical characteristics STM32G071x8/xB 90/133 DS12232 Rev 3 Figure 24. ADC accuracy characteristics Figure 25. Typical connection diagram using the ADC 1. Refer to Table 56: ADC characteristics for the values of RAIN and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (refer to Table 51: I/O static characteristics for the value of the pad capacitance). A high Cparasitic value will downgrade conversion accuracy. To remedy this, fADC should be reduced. 3. Refer to Table 51: I/O static characteristics for the values of Ilkg. General PCB design guidelines Power supply decoupling should be performed as shown in Figure 13: Power supply scheme. The 100 nF capacitor should be ceramic (good quality) and it should be placed as close as possible to the chip. MSv19880V3 (1) Example of an actual transfer curve (2) Ideal transfer curve (3) End point correlation line 4095 4094 4093 7 6 5 4 3 2 1 0 2 345 6 1 7 4093 4094 4095 ED 1 LSB ideal (1) (3) (2) EL ET EG EO Code (VAIN / VREF+)*4095 ET total unadjusted error: maximum deviation between the actual and ideal transfer curves. EG gain error: deviation between the last ideal transition and the last actual one. ED differential linearity error: maximum deviation between actual steps and the ideal ones. EL integral linearity error: maximum deviation between any actual transition and the end point correlation line. EO offset error: maximum deviation between the first actual transition and the first ideal one. MS33900V5 Sample and hold ADC converter 12-bit converter Cparasitic (2) Ilkg (3) VT CADC VDDA RAIN (1) VAIN VT AINx RADC |
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