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STM32G071C8 bảng dữ liệu(PDF) 66 Page - STMicroelectronics |
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STM32G071C8 bảng dữ liệu(HTML) 66 Page - STMicroelectronics |
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66 / 133 page ![]() Electrical characteristics STM32G071x8/xB 66/133 DS12232 Rev 3 5.3.6 Wakeup time from low-power modes and voltage scaling transition times The wakeup times given in Table 34 are the latency between the event and the execution of the first user instruction. TIM17 APB 0.7 0.7 0.5 LPTIM1 APB 3.2 2.7 3.0 LPTIM2 APB 3.1 2.5 3.0 I2C1 APB 3.8 3.1 3.5 I2C2 APB 0.7 0.6 1.0 SPI2 APB 1.5 1.2 1.0 USART1 APB 7.2 6.0 6.5 USART2 APB 7.2 6.0 6.0 USART3 APB 2.0 1.7 2.0 USART4 APB 2.0 1.7 2.0 LPUART1 APB 4.3 3.5 4.0 CEC APB 0.4 0.3 0.5 UCPD1 APB 4.0 7.7 NA(2) UCPD2 APB 4.0 7.7 NA(2) ADC APB 2.0 1.7 2.0 DAC APB 2.2 1.8 2.0 1. The AHB to APB Bridge is automatically active when at least one peripheral is ON on the APB. 2. UCPDx are always clocked by HSI16. Table 33. Current consumption of peripherals (continued) Peripheral Bus Consumption in µA/MHz Range 1 Range 2 Low-power run and sleep Table 34. Low-power mode wakeup times(1) Symbol Parameter Conditions Typ Max Unit tWUSLEEP Wakeup time from Sleep to Run mode -11 11 CPU cycles tWULPSLEEP Wakeup time from Low-power sleep mode Transiting to Low-power-run-mode execution in Flash memory not powered in Low-power sleep mode; HCLK = HSI16 / 8 = 2 MHz 11 14 |
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