XRT7250 datasheet(161/463 Pages) EXAR

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XRT7250

DS3/E3 FRAMER IC

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REV. 1.1.1

142

4.2.1.4

Mode 4 - The Nibble-Parallel/Loop-

Timed Mode Behavior of the XRT7250

If the XRT7250 has been configured to operate in this

mode, then the XRT7250 will behave as follows.

A. Looped Timing (Uses the RxLineClk as the

Timing Reference)

In this mode, the Transmit Section of the XRT7250

will use the RxLineClk signal as its timing reference.

When the XRT7250 is operating in the Nibble-Mode,

it will internally divide the RxLineClk signal, by a fac-

tor of four (4) and will output this signal via the TxNib-

Clk output pin.

B. Nibble-Parallel Mode

The XRT7250 will accept the DS3 payload data, from

the Terminal Equipment in a nibble-parallel manner,

via the TxNib[3:0] input pins. The Transmit Terminal

Equipment Input Interface block will latch this data in-

to its circuitry, on the rising edge of the TxNibClk out-

put signal.

C. Delineation of the outbound DS3 frames

The XRT7250 will pulse the TxNibFrame output pin

"High" for one bit-period coincident with the XRT7250

processing the last nibble of a given DS3 frame.

D. Sampling of payload data, from the Terminal

Equipment

In Mode 4, the XRT7250 will sample the data, at the

TxNib[3:0] input pins, on the third rising edge of the

RxOutClk clock signal, following a pulse in the TxNib-

Clk signal (see Figure 51).

NOTE: The TxNibClk signal, from the XRT7250 operates

nominally at 11.184 MHz (e.g., 44.736 MHz divided by 4).

However, for reasons described below, TxNibClk effectively

operates at a "Low"er clock frequency. The Transmit Pay-

load Data Input Interface is only used to accept the payload

data, which is intended to be carried by outbound DS3

frames. The Transmit Payload Data Input Interface is not

designed to accommodate the entire DS3 data stream.

The DS3 Frame consists of 4704 payload bits or 1176

nibbles. Therefore, the XRT7250 will supply 1176 Tx-

NibClk pulses between the rising edges of two con-

secutive TxNibFrame pulses. The DS3 Frame repeti-

tion rate is 9.398kHz. Hence, 1176 TxNibClk pulses

for each DS3 frame period amounts to TxNibClk run-

ning at approximately 11.052 MHz. The method by

which the 1176 TxNibClk pulses are distributed

throughout the DS3 frame period is presented below.

Nominally, the Transmit Section within the XRT7250

will generate a TxNibClk pulse for every 4 RxOutClk

(or TxInClk) periods. However, in 14 cases (within a

DS3 frame period), the Transmit Payload Data Input

Interface will allow 5 TxInClk periods to occur be-

tween two consecutive TxNibClk pulses.

Interfacing the Transmit Payload Data Input Inter-

face block of the XRT7250 to the Terminal Equip-

ment for Mode 4 Operation

Figure 50 presents an illustration of the Transmit Pay-

load Data Input Interface block (within the XRT7250)

being interfaced to the Terminal Equipment, for Mode

4 Operation.

Mode 4 Operation of the Terminal Equipment

When the XRT7250 is operating in this mode, it will

function as the source of the 11.184MHz (e.g., the

44.736MHz clock signal divided by "4") clock signal,

that will be used as the Terminal Equipment Interface

clock by both the XRT7250 and the Terminal Equip-

ment.

The Terminal Equipment will output the payload data

of the outbound DS3 data stream via its

DS3_Data_Out[3:0] pins on the rising edge of the

11.184MHz clock signal at the DS3_Nib_Clock_In in-

put pin.

The XRT7250 will latch the outbound DS3 data

stream (from the Terminal Equipment) on the rising

FIGURE 50. ILLUSTRATION OF THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA

INPUT INTERFACE BLOCK OF THE XRT7250 FOR MODE 4 (NIBBLE-PARALLEL/LOOP-TIMED) OPERATION

Terminal Equipment

XRT7250 DS3 Framer

DS3_Data_Out[3:0]

DS3_Nib_Clock_In

Tx_Start_of_Frame

TxNib[3:0]

TxNibClk

TxNibFrame

NibInt

VCC

RxLineClk

44.736MHz

11.184MHz

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