CDCE6214RGET datasheet(39/53 Pages) TI1

39 / 53 page

Processor

CNT1

PTP

CNT1

CMP

CDCE6214

2.4576GHz

VCO

25MHz

XTAL

N Div

98.304

PFD

(freq inc/dec by

< 1ppm steps)

PHY

MAC

Audio CODEC

Output

Divider

Output

Divider

CDCE6214

www.ti.com

SNAS811 – JULY 2020

Product Folder Links: CDCE6214

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10.2 Typical Application

Figure 36 shows typical block diagram for eAVB system using CDCE6214.

Figure 36. eAVB System Block Diagram Using CDCE6214

10.2.1 Design Requirements

For designs with the CDCE6214, the designer must select:

•

a primary or secondary input

•

an input type

•

an input frequency

•

a device communication mode (I2C and/or EEPROM)

•

the required device operation modes to configure the connections of GPIO pins

•

a supply voltage (1.8 V, 2.5 V, or 3.3 V)

•

a digital reference (1.8 V, 2.5 V, or 3.3 V)

•

an output reference (1.8 V, 2.5 V, or 3.3 V)

•

an output format

10.2.2 Detailed Design Procedure

The CDCE6214 is designed for ease-of-use. To power up the device:

1. Either tie the power supply pin (VDD_REF, VDD_VCO, VDDO_12 and VDDO_34) together or independently

connect them to the 1.8-V, 2.5-V, or 3.3-V power supply.

2. Solder the GND Pin (DAP) to the PCB Plane.

3. Ensure that the REFSEL, HW_SW_CTRL, and PDN configuration pins are appropriately connected:

1. Internally connect the PDN pin to VDD_REF through a pullup resistor. When floating, the PDN pin would

automatically release device from PDN.

2. If PDN pin is low, the device will not respond to I2C commands.

3. REFSEL and HW_SW_CTRL are tri-level pins. If left floating, the device will start in fall-back mode.

CDCE6214RGET bảng dữ liệu(PDF) 39 Page - Texas Instruments

CDCE6214RGET bảng dữ liệu(HTML) 39 Page - Texas Instruments

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