MPC18730EPSLASHR2 datasheet(8/38 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

18730

STATIC ELECTRICAL CHARACTERISTICS

Switching Power Supply 2

VCC2 Output Voltage (Io = 0~80 mA)

DW_2T Output Voltage (12) (Isource = 400 µA)

(Isink = 400 µA)

DW_2B Output Voltage (12) (Isource = 400 µA)

(Isink = 400 µA)

VCC2

VDW2TH

VDW2TL

VDW2BH

VDW2BL

1.05

5.2

1.15

1.25

0.3

Series Pass Power Supply Circuit

SREG1 Control Voltage (Io = 5~60 mA) (13)

SREG1-Error AMP Input offset voltage (14)

SREG2 Control Voltage (Io = 6~80 mA) (13)

SREG2-Error AMP Input offset voltage (15)

SREG3 Control Voltage (Io = 5~60 mA) (13)

SREG3-Error AMP Input offset voltage (16)

SREG2G Output Voltage (17) (Isource = 2.5 µA)

(Isink = 2.5 µA)

VSREG1

SR1OFST

VSREG2

SR2OFST

VSREG3

SR3OFST

SREG2GH

SREG2GL

2.7

-13.5

2.7

-17

2.7

-11

2.8

2.9

24.5

2.9

0.5

Power Switch On Resistance

VCC1 Circuit

VCC2 Circuit

RVCC1

RVCC2

0.4

0.6

Ω

VG Power Supply Circuit

(Io = 0~6 mA) (18)

(Io = 0~6 mA) (19)

C1L Output Voltage (Isource = 2.5 mA)

(Isink = 2.5 mA)

VGH Voltage (Certified value)

VG_00

VG_10

VO11LH

VO11LL

VGH

5.5

4.6

VB x 0.85

6.0

5.0

6.5

5.4

0.4

10.5

V_STBY Output Voltage for Li_ion (Io = 300 µA) (20)

VLVB

1.75

2.45

Notes

12.

Connect a transistor with gate capacity of 200 pF or smaller to DW_2T and DW_2B

13.

If a capacitor with capacitance of 22µF is connected to SREGO, use a phase compensation capacitor between SREGO and SREGC

when the load is 5 mA (6 mA for SREG2) or lower. The output voltage values shown in the table assume that external resistance is

connected as follows:

SREGI1 = 3.0V to 3.3V, 65.14KΩ between SREGO1 and SREGC1, 34.86KΩ between SREGC1 and GND.

SREGI2 = 3.0V to 3.3V, 54.46KΩ between SREGO2 and SREGC2, 45.54KΩ between SREGC2 and GND.

SREGI3 = 3.0V to 3.3V, 73.84KΩ between SREGO3 and SREGC3, 26.16KΩ between SREGC3 and GND.

14.

Calculated by the right formula for input offset: SR1OFST=(Vref x 0.77) - (SREGO1 ÷ (100k ÷ 34.86k))

15.

Calculated by the right formula for input offset: SR2OFST=(Vref x 1) - (SREGO1 ÷ (100k ÷ 45.54k))

16.

Calculated by the right formula for input offset: SR3OFST=(Vref x 0.58) - (SREGO1 ÷ (100k ÷ 26.16k))

17.

Connect a transistor with gate capacity of 300 pF or smaller to REG2G.

18.

When VGSEL1 is Low and VGSEL2 is Low, I/O=3mA or higher is certified by specification.

19.

When VGSEL1 is High and VGSEL2 is Low, I/O=3mA or higher is certified by specification.

20.

When HVB is 4.2V and the load from V_STBY is 0.5µA or higher.

Table 3. Static Electrical Characteristics (continued)

Characteristics noted under conditions VB = 1.2 V, VO1 = 2.4 V, VG = 6.0 V, fCLK = 176.4 kHz unless otherwise noted. Typical

values noted reflect the approximate parameter means at TA = 27°C under nominal conditions unless otherwise noted.

Characteristic

Symbol

Min

Typ

Max

Unit

This paragraph is boilerplate - you may add to it but, can not change wording. You may change numeric values

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