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PSMN7R0-40LS bảng dữ liệu(PDF) 9 Page - Nexperia B.V. All rights reserved

tên linh kiện PSMN7R0-40LS
Giải thích chi tiết về linh kiện  N-channel DFN3333-8 40 V 7.0 m廓 standard level MOSFET
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PSMN7R0-40LS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 13 December 2011
8 of 14
NXP Semiconductors
PSMN7R0-40LS
N-channel DFN3333-8 40 V 7.0 m
Ω standard level MOSFET
Tj = 25°C; tp = 300 µs
Fig 13. Drain-source on-state resistance as a function
of drain current; typical values
Fig 14. Gate charge waveform definitions
Tj = 25°C and ID = 30 A
VGS = 0 V, f = 1 MHz
Fig 15. Gate-source voltage as a function of gate
charge; typical values
Fig 16. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
003aae522
0
5
10
15
20
25
0
1530
4560
ID(A)
RDSon
(m
Ω)
10
6.0
8.0
5.5
6.5
VGS(V) = 5.0
7.0
003aaa508
VGS
VGS(th)
QGS1
QGS2
QGD
VDS
QG(tot)
ID
QGS
VGS(pl)
003aae523
0
2
4
6
8
10
010
20
30
QG (nC)
VGS
(V)
VDS = 20 V
32 V
8 V
003aae524
102
103
104
10−2
10−1
1
10
102
VDS (V)
C
(pF)
Ciss
Crss
Coss



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