LS1022A datasheet(5/71 Pages) FREESCALE

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TWR-LS1021A Reference Manual, Rev. 0

Freescale Semiconductor

Contents

Paragraph

Number

Title

Page

Number

Contents

Chapter 1

LS1021A/LS1020A Overview

1.1

Related documentation .................................................................................................... 1-1

1.2

Silicon features ................................................................................................................ 1-2

1.3

Board features .................................................................................................................. 1-3

1.4

Block diagram.................................................................................................................. 1-4

1.5

Lead-Free/RoHS .............................................................................................................. 1-6

Chapter 2

Architecture

2.1

Processor .......................................................................................................................... 2-2

2.2

Power ............................................................................................................................... 2-2

2.2.1

VDD/VDDC - Core and platform supply power ......................................................... 2-3

2.2.2

GVDD, OVDD, BVDD, DVDD, EVDD, LVDD, and general I/O power.................. 2-4

2.2.3

Fuse programming power ............................................................................................ 2-5

2.3

Deep sleep control ...........................................................................................................2-6

2.4

Reset................................................................................................................................. 2-6

2.5

Device configuration........................................................................................................ 2-7

2.6

Clocks .............................................................................................................................. 2-7

2.6.1

SYSCLK / DDRCLK................................................................................................... 2-8

2.6.1.1

Single-Source SYSCLK .......................................................................................... 2-9

2.6.2

SerDes clocks............................................................................................................... 2-9

2.6.3

Ethernet and USB clocks ............................................................................................. 2-9

2.7

Memory controllers.......................................................................................................... 2-9

2.8

SerDes port .................................................................................................................... 2-10

2.8.1

PCI Express support................................................................................................... 2-11

2.8.2

SGMII support ........................................................................................................... 2-12

2.8.3

SATA support............................................................................................................. 2-12

2.8.4

SerDes configuration and setup ................................................................................. 2-12

2.9

Ethernet controllers........................................................................................................ 2-13

2.10

Ethernet management interface ..................................................................................... 2-13

2.10.1

IEEE-1588™ support ................................................................................................. 2-14

2.11

USB interface................................................................................................................. 2-15

2.11.1

USB configuration and setup..................................................................................... 2-16

2.12

Local bus........................................................................................................................ 2-16

2.12.1

IFC chip select ...........................................................................................................2-17

2.12.2

Memory map.............................................................................................................. 2-17

2.12.3

Virtual banks .............................................................................................................. 2-17

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