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DP83821 bảng dữ liệu(PDF) 44 Page - National Semiconductor (TI) |
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DP83821 bảng dữ liệu(HTML) 44 Page - National Semiconductor (TI) |
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44 / 86 page ![]() 44 www.national.com 4.0 Register Set (Continued) 4.2.3 MII/EEPROM Access Register The MII/EEPROM Access Register provides an interface for software access to the serial management port of an external MII device or NMC9306 style EEPROM. The default values given assume that the MDIO and EEDO lines have pullup resistors to VDD. Tag: MEAR Size: 32 bits Hard Reset: 00000012h Offset: 0008h Access: Read Write Soft Reset: 00000012h bit tag description usage 31-7 unused 6 MDC MII Management Clock Read-Write. Controls the value of the MDC pin. When set, the MDC pin is 1, when clear the MDC pin is 0. 5 MDDIR MII Management Direction Read-Write. Controls the direction of MDIO pin. When set, MacPhyter3V drives the current state of the MDIO bit onto the MDIO pin. When clear, the MDIO bit reflects the current state of the MDIO pin. 4 MDIO MII Management Data Read-Write. Provides software access to the MDIO pin (see MDDIR). 3 EESEL EEPROM Chip Select Controls the value of the EESEL pin. When set, the EESEL pin is 1; when clear the EESEL pin is 0. R/W 2 EECLK EEPROM Serial Clock Controls the value of the EECLK pin. When set, the EECLK pin is 1; when clear the EECLK pin is 0. R/W 1 EEDO EEPROM Data Out Returns the current state of the EEDO pin. When set, the EEDO pin is 1; when clear the EEDO pin is 0. RO 0 EEDI EEPROM Data In Controls the value of the EEDI pin. R/W |
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