HD64F2145 datasheet(321/829 Pages) RENESAS

321 / 829 page

Rev. 2.0, 08/02, page 281 of 788

Bit

Bit Name Initial Value R/W

Description

OS1

OS0

R/W

Output Select 1, 0

These bits specify how the TMOX pin output level is to be

changed by compare-match A of TCORA_X and

TCNT_X.

00: No change

01: 0 is output

10: 1 is output

11: Output is inverted (toggle output)

Note:* Only 0 can be written, for flag clearing.

12.3.6

Input Capture Register (TICR)

TICR is an 8-bit register. The contents of TCNT are transferred to TICR at the rising edge of the

external reset input. TICR cannot be directly accessed by the CPU. The TICR function is used for

the timer connection. For details, refer to section 13, Timer Connection.

12.3.7

Time Constant Register (TCORC)

TCORC is an 8-bit readable/writable register. The sum of contents of TCORC and TICR is always

compared with TCNT. When a match is detected, a compare-match C signal is generated.

However, comparison at the T2 state in the write cycle to TCORC and at the input capture cycle of

TICR is disabled. TCORC is initialized to H'FF. The TCORC function is used for the timer

connection. For details, refer to section 13, Timer Connection.

12.3.8

Input Capture Registers R and F (TICRR, TICRF)

TICRR and TICRF are 8-bit read-only registers. The contents of TCNT are transferred at the

rising edge and falling edge of the external reset input in that order, when the ICST bit in TCONRI

of the timer connection is set to 1. The ICST bit is cleared to 0 when one capture operation ends.

TICRR and TICRF are initialized to H'00. The TICRR and TICRF functions are used for timer

connection. For details, refer to section 13, Timer Connection.

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