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DAC5687IPZP bảng dữ liệu(PDF) 11 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  16-BIT, 500 MSPS 2x-8x INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
PDF  72 Pages
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Trang chủ  http://www.ti.com
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DAC5687IPZP bảng dữ liệu(HTML) 11 Page - Texas Instruments

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Typical Characteristics
1
Code
−8
−6
−4
−2
0
2
4
6
8
0
10000 20000 30000 40000 50000 60000 70000
G001
Code
−6
−4
−2
0
2
4
6
0
10000 20000 30000 40000 50000 60000 70000
G002
f − Frequency − MHz
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
10
0
50
100
150
200
250
G003
fdata = 125 MSPS
fin = 20 MHz Real
IF = 20 MHz
y4 Interpolation
PLL Off
f − Frequency − MHz
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
10
0
50
100
150
200
250
G004
fdata = 125 MSPS
fin = −30 MHz Complex
IF = 95 MHz
y4L Interpolation
CMIX
PLL Off
DAC5687
SLWS164B – FEBRUARY 2005 – REVISED JUNE 2005
ELECTRICAL CHARACTERISTICS (DIGITAL SPECIFICATIONS) (continued)
over recommended operating free-air temperature range, AVDD = 3.3 V, CLKVDD = 3.3 V, PLLVDD = 3.3 V, IOVDD = 3.3 V,
DVDD = 1.8 V, IOUT
FS = 19.2 mA (unless otherwise noted)
DIGITAL SPECIFICATIONS
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
High impedance load on PLLLOCK. Note that
Delay from CLK2 rising edge to PLLLOCK
tdelay(Plllock)
PLLLOCK delay increases with a lower im-
4.5
ns
rising edge
pedance load.
Figure 1. Integral Nonlinearity
Figure 2. Differential Nonlinearity
Figure 3. Single Tone Spectral Plot
Figure 4. Single Tone Spectral Plot
11



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