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DAC5687IPZP bảng dữ liệu(PDF) 60 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  16-BIT, 500 MSPS 2x-8x INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
PDF  72 Pages
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nhà sản xuất  TI [Texas Instruments]
Trang chủ  http://www.ti.com
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DAC5687IPZP bảng dữ liệu(HTML) 60 Page - Texas Instruments

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(a) X2 Mode
(b) X4L Mode
fDAC − MHz
0
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G032
fDAC/2
fDAC − MHz
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G033
fDAC/2
fDAC/4
(c) X4 Mode
(d) X8 Mode
fDAC − MHz
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G034
fDAC/2
fDAC/4
fDAC x 3/4
fDAC − MHz
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fDAC/2
fDAC/4
fDAC x 3/4
fDAC/8
fDAC x 7/8
DAC5687
SLWS164B – FEBRUARY 2005 – REVISED JUNE 2005
Figure 70 and Figure 71 show the typical worst case spurious signal amplitudes vs fDAC for a signal frequency
fSIG = 11 x fDAC/32 in each mode for PLL on (PLL clock mode) and PLL off (external and dual clock modes). Each
spurious signal (fDAC/2, fDAC/4 and fDAC/8) has its own curve. The spurious signal amplitudes can then be
adjusted for the exact signal frequency fSIG by applying the amplitude adjustment factor shown in Figure 72. The
amplitude adjustment factor is the same for each spurious signal (fDAC/2, fDAC/4, and fDAC/8) and is normalize for
fSIG = 11 x fDAC/32.
Figure 70. Clock Related Spurious Signal Amplitude With PLL Off for fSIG = 11 x fDAC / 32
60



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