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GD25LB256DFIS bảng dữ liệu(PDF) 71 Page - GigaDevice Semiconductor (Beijing) Inc.

tên linh kiện GD25LB256DFIS
Giải thích chi tiết về linh kiện  1.8V Uniform Sector Dual and Quad Serial Flash
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1.8V Uniform Sector
Dual and Quad Serial Flash
GD25LB256D
71
8.6.
AC CHARACTERISTICS
(T= -40℃~85℃, VCC=1.65~2.0V, CL=30pf)
Symbol
Parameter
Min.
Typ.
Max.
Unit.
fC
Serial Clock Frequency For: all command except for 03H
120
MHz
fR
Serial Clock Frequency For: Read (03H)
80
MHz
tCLH
Serial Clock High Time
3.5
ns
tCLL
Serial Clock Low Time
3.5
ns
tCLCH
Serial Clock Rise Time (Slew Rate)
0.1
V/ns
tCHCL
Serial Clock Fall Time (Slew Rate)
0.1
V/ns
tSLCH
CS# Active Setup Time
5
ns
tCHSH
CS# Active Hold Time
5
ns
tSHCH
CS# Not Active Setup Time
5
ns
tCHSL
CS# Not Active Hold Time
5
ns
tSHSL
CS# High Time (Read/Write)
20
ns
tSHQZ
Output Disable Time
6
ns
tCLQX
Output Hold Time
1.2
ns
tDVCH
Data In Setup Time
2
ns
tCHDX
Data In Hold Time
2
ns
tCLQV
Clock Low To Output Valid
7
ns
tRST
CS# High To Next Command After Reset (Except From Erase)
30
μs
tRST_E
CS# High To Next Command After Reset (From Erase)
12
ms
tDP
CS# High To Deep Power-Down Mode
20
μs
tRES1
CS# High To Standby Mode Without Electronic Signature Read
20
μs
tRES2
CS# High To Standby Mode With Electronic Signature Read
20
μs
tSUS
CS# High To Next Command After Suspend
20
μs
tRS
Latency Between Resume And Next Suspend
100
μs
tW
Write Status Register Cycle Time
10
60
ms
tPP
Page Programming Time
0.5
2.4
ms
tSE
Sector Erase Time
70
400
ms
tBE1
Block Erase Time (32K Bytes)
0.16
0.8
s
tBE2
Block Erase Time (64K Bytes)
0.3
1.2
s
tCE
Chip Erase Time (GD25LB256D)
100
240
s
Note:
1. Typical values given for TA=25°C.
2. Value guaranteed by design and/or characterization, not 100% tested in production.



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