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OPA818 bảng dữ liệu(PDF) 8 Page - Texas Instruments |
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OPA818 bảng dữ liệu(HTML) 8 Page - Texas Instruments |
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8 / 27 page ![]() + ± VIN RG VREF VREF RF VSIG VREF ±(RF / RG) × VSIG VOUT VS+ VS± + ± VIN RG VREF VREF RF VSIG VREF (1 + RF / RG) × VSIG VOUT VS+ VS± 8 OPA818 SBOS940 – MAY 2019 www.ti.com Product Folder Links: OPA818 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated 7 Detailed Description 7.1 Overview The OPA818 is a 13 V supply, 2.7 GHz gain-bandwidth product (GBWP), voltage feedback operational amplifier (op amp) featuring a 2.2nV/ √Hz low noise JFET input stage. The OPA818 is decompensated to be normally stable in gains ≥ 7 V/V. The decompensated architecture allows for a favorable tradeoff of low quiescent current for a very high GBWP and low distortion performance in high gain applications. The high voltage capability combined with 1400 V/µs slew rate enables applications needing wide output swings (10 VPP at VS = 12 V) for high frequency signals such as those often found in optical front-end, test and measurement applications, and medical systems. The low noise JFET input with pico amperes of bias current makes the device particularly attractive for high transimpedance gain TIA applications and for test and measurement front-ends. OPA818 also features power down mode that disables the core amplifier for power savings. OPA818 is built using TI's proprietary high-voltage high-speed complementary bipolar SiGe process. 7.2 Functional Block Diagram The OPA818 is a conventional voltage feedback op amp with two high-impedance inputs and a low-impedance output. Standard amplifier configurations are supported like the two basic configurations shown in Figure 6 and Figure 7. The DC operating point for each configuration is level-shifted by the reference voltage (VREF), which is typically set to midsupply in single-supply operation. VREF is typically set to ground in split-supply applications. Figure 6. Noninverting Amplifier Figure 7. Inverting Amplifier 7.3 Feature Description 7.3.1 Input and ESD Protection The OPA818 is built using a very high speed complementary bipolar process. The internal junction breakdown voltages are relatively low for these very small geometry devices. These breakdowns are reflected in the Absolute Maximum Ratings table. All device pins are protected with internal ESD protection diodes to the power supplies as shown in Figure 8. These diodes provide moderate protection to input overdrive voltages beyond the supplies as well. The protection diodes can typically support 10-mA continuous current. Where higher currents are possible (for example, in systems with ±12-V supply parts driving into the OPA818), current limiting series resistors should be added in series with the two inputs to limit the current. Keep these resistor values as low as possible because high values degrade both noise performance and frequency response. There are no back-to-back ESD diodes between VIN+ and VIN–. As a result, the differential input voltage between VIN+ and VIN– is entirely absorbed by the VGS of the input JFET differential pair and must not exceed the voltage ratings shown in Absolute Maximum Ratings table. |
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