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NM1282KSLAXAL bảng dữ liệu(PDF) 93 Page - Nanya Technology Corporation.

tên linh kiện NM1282KSLAXAL
Giải thích chi tiết về linh kiện  MCP Specification
PDF  120 Pages
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NM1282KSLAXAL bảng dữ liệu(HTML) 93 Page - Nanya Technology Corporation.

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Version 1.3
93
Nanya Technology Corp.
06/2018
All Rights Reserved. ©
2Gb SLC NAND + 2Gb LPDDR2
NM1282KSLAXAL
NTC Proprietary
Level: Property
Electrical Characteristics and Recommended AC Timing
VDD2,VDDQ,VDDCA = 1.14~1.30V; VDD1 = 1.70~1.95V
Parameter
Symbol
min/
max
1066
Unit
Clock Timing
Max. Frequency
~
533
MHz
Average Clock Period
tCK(avg)
min
1.875
ns
max
100
ns
Average high pulse width
tCH(avg)
min
0.45
tCK(avg)
max
0.55
tCK(avg)
Average low pulse width
tCL(avg)
min
0.45
tCK(avg)
max
0.55
tCK(avg)
Absolute Clock Period
tCK(abs)
min
tCK(avg)min + tJIT(per),min
ps
Absolute clock HIGH pulse width
(with allowed jitter)
tCH(abs),
allowed
min
0.43
tCK(avg)
max
0.57
tCK(avg)
Absolute clock LOW pulse width
(with allowed jitter)
tCL(abs),
allowed
min
0.43
tCK(avg)
max
0.57
tCK(avg)
Parameter
Symbol
min/
max
1066
Unit
Clock Period Jitter
(with allowed jitter)
tJIT(per),
allowed
min
-90
ps
max
90
ps
Maximum Clock Jitter between
two consecutive clock cycles
(with allowed jitter)
tJIT(cc),
allowed
max
180
ps
Duty cycle Jitter
(with allowed jitter)
tJIT(duty),
allowed
min
min((tCH(abs),min - tCH(avg),min),
(tCL(abs),min - tCL(avg),min)) * tCK(avg)
ps
max
max((tCH(abs),max - tCH(avg),max),
(tCL(abs),max - tCL(avg),max)) * tCK(avg)
ps
Cumulative error across 2 cycles
tERR(2per),
min
-132
ps
allowed
max
132
ps
Cumulative error across 3 cycles
tERR(3per),
min
-157
ps
allowed
max
157
ps
Cumulative error across 4 cycles
tERR(4per),
min
-175
ps
allowed
max
175
ps



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