TUSB8044AI datasheet(4/63 Pages) TI1

4 / 63 page

USB_DP_DN1

USB_VBUS

USB_DM_DN1

OVERCUR2z

USB_SSTXP_DN1

OVERCUR1z

USB_SSTXM_DN1

BBbmConfigured1/AUTOENz/

HS_SUSPEND

VDD

OVERCUR3z

USB_SSRXP_DN1

OVERCUR4z

USB_SSRXM_DN1

BBEN/GANGED,HS_UP

VDD

PWRCTL_POL

USB_DP_DN2

BBbmConfigured0/FULLAUTOz/

FULLPWRMGMTz/SS_UP

USB_DM_DN2

SMBUSz,SS_SUSPEND

USB_SSTXP_DN2

SCL/SMBCLK

USB_SSTXM_DN2

SDA/SMBDAT

VDD

PWRCTL1/BATEN1

USB_SSRXP_DN2

PWRCTL2/BATEN2

USB_SSRXM_DN2

VDD33

PWRCTL3/BATEN3

Not to scale

Thermal

Pad

TUSB8044A

SLLSF92 – FEBRUARY 2019

www.ti.com

Product Folder Links: TUSB8044A

Submit Documentation Feedback

6 Pin Configuration and Functions

RGC Package

64 Pin (VQFN)

(Top View)

Pin Functions

I/O

DESCRIPTION

NAME

NO.

Clock and Reset Signals

GRSTz

I, PU

Global power reset. This reset brings all of the TUSB8044A internal registers to their default

states. When GRSTz is asserted, the device is completely nonfunctional.

Crystal input. This pin is the crystal input for the internal oscillator. The input may alternately

be driven by the output of an external oscillator. When using a crystal a 1-M

Ω feedback

resistor is required between XI and XO.

Crystal output. This pin is the crystal output for the internal oscillator. If XI is driven by an

external oscillator this pin may be left unconnected. When using a crystal a 1-M

Ω feedback

resistor is required between XI and XO.

USB Upstream Signals

USB_SSTXP_UP

USB SuperSpeed transmitter differential pair (positive)

USB_SSTXM_UP

USB SuperSpeed transmitter differential pair (negative)

USB_SSRXP_UP

USB SuperSpeed receiver differential pair (positive)

TUSB8044AI bảng dữ liệu(PDF) 4 Page - Texas Instruments

TUSB8044AI bảng dữ liệu(HTML) 4 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63

bảng dữ liệu tải về

Link URL