SCD1284 datasheet(148/176 Pages) INTEL

148 / 176 page

CD1284 — IEEE 1284-Compatible Parallel Interface Controller

148

Datasheet

7.8.4

Manual Data Register

This read/write register can read the state of the PD[7:0] signals in any mode. If the ManMd bit

(PCR[7]) and the MMDir and ManOE bits (PCR[1:0]) are set, then the value written into this

7.8.5

Negotiation Enable Register

Each bit set along with EICR (PCR[6]) allows the CD1284 to engage in IEEE STD 1284

negotiations and move into the corresponding protocol. It is assumed that the peripheral host

software responds to a request for slave ID and is able to send an ID string in any supported

protocol. In response to an ID request, the CD1284 does not provide a method of storing and

automatically sending an ID string. Note that the EPP protocol does not have provision for slave ID

requests.

7.8.6

Negotiation Status Register

The results of negotiation attempts are stored in this register.

Access: Read/Write

8-Bit Hex Address: 21

Default Value: 00

Bit 7Bit 6Bit 5

Bit 4

Bit 3Bit 2Bit 1Bit 0

8-bit Binary Data

Access: Read/Write

8-Bit Hex Address: 28

Default Value: 00

Bit 7Bit 6Bit 5Bit 4Bit 3

Bit 2Bit 1

Bit 0

RID

EPP

RLE

ECP

RVB

RVN

Bit

Description

Reserved: This read-only bit is always ‘0’.

Request Slave ID

Reserved: This bit must always be ‘0’.

EPP Mode Enable

Run Length Encoding in ECP Mode Enable

ECP Mode Enable

Reverse Byte Mode Enable

Reverse Nibble Mode Enable

Access: Read/Write

8-Bit Hex Address: 29

Default Value: 00

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

NegOK

NegFl

HostTO

ImedTerm

4-bit Negotiation Result Code

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