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LPC47M192 bảng dữ liệu(PDF) 37 Page - SMSC Corporation

tên linh kiện LPC47M192
Giải thích chi tiết về linh kiện  LPC SUPER I/O WITH HARDWARE MONITORING BLOCK
PDF  228 Pages
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nhà sản xuất  SMSC [SMSC Corporation]
Trang chủ  http://www.smsc.com
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LPC47M192 bảng dữ liệu(HTML) 37 Page - SMSC Corporation

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SMSC DS – LPC47M192
Page 37
Rev. 03/30/05
DATASHEET
Note:
The DSR is Shadowed in the Floppy Data Rate Select Shadow Register, located at the offset 0x1F in the
runtime register block Separator circuits will be turned off. The controller will come out of manual low
power.
Table 8 – Data Rates
DRIVE RATE
DATA RATE
DATA RATE
DRATE(1)
DRT1
DRT0
SEL1
SEL0
MFM
FM
DENSEL
1
0
0
0
1
1
1Meg
---
1
1
1
0
0
0
0
500
250
1
0
0
0
0
0
1
300
150
0
0
1
0
0
1
0
250
125
0
1
0
0
1
1
1
1Meg
---
1
1
1
0
1
0
0
500
250
1
0
0
0
1
0
1
500
250
0
0
1
0
1
1
0
250
125
0
1
0
1
0
1
1
1Meg
---
1
1
1
1
0
0
0
500
250
1
0
0
1
0
0
1
2Meg
---
0
0
1
1
0
1
0
250
125
0
1
0
Drive Rate Table (Recommended) 00 = 360K, 1.2M, 720K, 1.44M and 2.88M Vertical Format
01 = 3-Mode Drive
10 = 2 Meg Tape
Note 1: The DRATE and DENSEL values are mapped onto the DRVDEN pins.
Table 9 – DRVDEN Mapping
DT1
DT0
DRVDEN1 (1)
DRVDEN0 (1)
DRIVE TYPE
0
0
DRATE0
DENSEL
4/2/1 MB 3.5”
2/1 MB 5.25” FDDS
2/1.6/1 MB 3.5” (3-MODE)
1
0
DRATE0
DRATE1
0
1
DRATE0
nDENSEL
PS/2
1
1
DRATE1
DRATE0
Table 10 – Default Precompensation Delays
DATA RATE
PRECOMPENSATION
DELAYS
2 Mbps
1 Mbps
500 Kbps
300 Kbps
250 Kbps
20.8 ns
41.67 ns
125 ns
125 ns
125 ns



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