PIC12F508 datasheet(63/98 Pages) MICROCHIP

63 / 98 page

 2004 Microchip Technology Inc.

Preliminary

DS41236A-page 61

PIC12F508/509/16F505

RETLW

Return with Literal in W

Syntax:

[ label ]

RETLW k

Operands:

≤ k ≤ 255

Operation:

→ (W);

TOS

→ PC

Status Affected:

None

Description:

The W register is loaded with the

eight-bit literal ‘k’. The program

counter is loaded from the top of

the stack (the return address). This

is a two-cycle instruction.

RLF

Rotate Left f through Carry

Syntax:

[ label ]

RLF

f,d

Operands:

≤ f ≤ 31

∈ [0,1]

Operation:

See description below

Status Affected:

Description:

The contents of register ‘f’ are

rotated one bit to the left through

the Carry flag. If ‘d’ is ‘0’, the result

is placed in the W register. If ‘d’ is

‘1’, the result is stored back in reg-

ister ‘f’.

RRF

Rotate Right f through Carry

Syntax:

[ label ]

RRF f,d

Operands:

≤ f ≤ 31

∈ [0,1]

Operation:

See description below

Status Affected:

Description:

The contents of register ‘f’ are

rotated one bit to the right through

the Carry flag. If ‘d’ is ‘0’, the result

is placed in the W register. If ‘d’ is

‘1’, the result is placed back in

SLEEP

Enter SLEEP Mode

Syntax:

[label ]

SLEEP

Operands:

None

Operation:

00h

→ WDT;

→ WDT prescaler;

→ TO;

→ PD

Status Affected:

TO, PD, RBWUF

Description:

Time-out Status bit (TO) is set. The

Power-down Status bit (PD) is

cleared.

RBWUF is unaffected.

The WDT and its prescaler are

cleared.

The processor is put into Sleep

mode with the oscillator stopped.

See Section 7.9 “Power-down

Mode (Sleep)” on Sleep for more

details.

SUBWF

Subtract W from f

Syntax:

[label ]

SUBWF f,d

Operands:

≤ f ≤ 31

∈ [0,1]

Operation:

(f) – (W)

→ (dest)

Status Affected:

C, DC, Z

Description:

Subtract (2’s complement method)

the W register from register ‘f’. If ‘d’

is ‘0’, the result is stored in the W

stored back in register ‘f’.

SWAPF

Swap Nibbles in f

Syntax:

[ label ] SWAPF f,d

Operands:

≤ f ≤ 31

∈ [0,1]

Operation:

(f<3:0>)

→ (dest<7:4>);

(f<7:4>)

→ (dest<3:0>)

Status Affected:

None

Description:

The upper and lower nibbles of

‘0’, the result is placed in W

placed in register ‘f’.

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