IMX6SLLIEC datasheet(74/88 Pages) NXP

74 / 88 page

i.MX 6SLL Applications Processors for Industrial Products, Rev. 0.2, 11/2017

NXP Semiconductors

Package Information and Contact Assignments

DRAM_DQM0

DRAM

DDR

ALT0

DRAM_DQM[0]

Output

(100K)

DRAM_DQM1

DRAM

DDR

ALT0

DRAM_DQM[1]

Output

(100K)

DRAM_DQM2

DRAM

DDR

ALT0

DRAM_DQM[2]

Output

(100K)

DRAM_DQM3

DRAM

DDR

ALT0

DRAM_DQM[3]

Output

(100K)

DRAM_SDCKE0

DRAM

DDR

ALT0

DRAM_SDCKE[0]

Output

(100K)

DRAM_SDCKE1

DRAM

DDR

ALT0

DRAM_SDCKE[1]

Output

(100K)

DRAM_SDCLK_0

DRAM

DDRCL

ALT0

DRAM_SDCLK[0]

Input

Hi-Z

(100K)

DRAM_SDCLK_0_B

DRAM

—

DRAM_SDQS0

DRAM

DDRCL

ALT0

DRAM_SDQS[0]

Input

Hi-Z

Not

connected

DRAM_SDQS0_B

DRAM

—

DRAM_SDQS1

DRAM

DDRCL

ALT0

DRAM_SDQS[1]

Input

Hi-Z

Not

connected

DRAM_SDQS1_B

DRAM

—

DRAM_SDQS2

DRAM

DDRCL

ALT0

DRAM_SDQS[2]

Input

Hi-Z

Not

connected

DRAM_SDQS2_B

DRAM

—

DRAM_SDQS3

DRAM

DDRCL

ALT0

DRAM_SDQS[3]

Input

Hi-Z

Not

connected

DRAM_SDQS3_B

DRAM

—

ECSPI1_MISO

L18

GPIO

ALT5

GPIO4_GPIO[10]

Not

connected

Hi-Z

ECSPI1_MOSI

M18

GPIO

ALT5

GPIO4_GPIO[9]

Not

connected

Hi-Z

ECSPI1_SCLK

M17

GPIO

ALT5

GPIO4_GPIO[8]

Not

connected

Hi-Z

ECSPI1_SS0

L17

GPIO

ALT5

GPIO4_GPIO[11]

Not

connected

Hi-Z

Table 64. 14 x 14 mm Functional Contact Assignments (continued)

Ball Name

Ball

Power Group1

Ball

Type

Out of Reset Condition2

During

Reset

Condition

Defaul

t Mode

(Reset

Mode)

Default Function

Input /

Output

Value3

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