T7906EKTSLASHSC datasheet(4/42 Pages) ATMEL

4 / 42 page

T7906E

Rev. A – 27-Aug.-01

Communication device for microprocessors

Many applications require a link front end providing one link, but no controller instance

on that unit. Due to the communication memory interface of the SMCSlite, it is also sat-

isfying the requirements of these applications. Due to its small package and low power

consumption it is an excellent alternative to FPGA based solutions. A system using the

SMCSlite as a communication front-end for a microcontroller is shown in the figure

below:

Figure 2. Example application

Interfaces

FIFO interface

The FIFO interface provides the control signals full, write, empty and read, depending

on the direction of the data flow (receive/transmit).

Data received from the FIFO interface is sent over the IEEE-1355 link grouped in pack-

ets. The length of a packet (in bytes) can be specified either by setting an internal

counter or by external signals. This interface can be programmed to use 0 to 7 wait

states.

ADC/DAC interface

The ADC interface allows to connect an ADC with a width of up to 16 bits directly to the

T7906E. The AD conversion can be started by request via link or in a cyclic manner trig-

gered by the on-chip timers. When the AD conversion is ready, this is recognized by an

external signal like "ready" or by an internal trigger, for example from the on-chip timer.

After reading the sample from the ADC it is then sent over the link. An 8-bit address gen-

erator is provided to allow multiplexing of analog signals. The address generator will

start at a pre-programmed start address and will be incremented after each conversion.

The DAC interface is very similar to the ADC interface. It provides up to 16 data lines

and the required control signals. The data to be sent to the DAC is received from the link

and is stored in a register until the command "start DAC" is received. After that com-

mand the register values will be put to the DAC.

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