MPC755 datasheet(45/56 Pages) MOTOROLA

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MPC755 RISC Microprocessor Hardware Specifications, Rev. 6.1

Freescale Semiconductor

System Design Information

Alpha Novatech

408-749-7601

473 Sapena Ct. #15

Santa Clara, CA 95054

Internet: www.alphanovatech.com

International Electronic Research Corporation (IERC)

818-842-7277

413 North Moss St.

Burbank, CA 91502

Internet: www.ctscorp.com

Tyco Electronics

800-522-6752

Chip Coolers™

P.O. Box 3668

Harrisburg, PA 17105-3668

Internet: www.chipcoolers.com

Wakefield Engineering

603-635-5102

33 Bridge St.

Pelham, NH 03076

Internet: www.wakefield.com

Ultimately, the final selection of an appropriate heat sink depends on many factors, such as thermal performance at

a given air velocity, spatial volume, mass, attachment method, assembly, and cost.

8.8.1 Internal Package Conduction Resistance

For the exposed-die packaging technology, shown in Table 4, the intrinsic conduction thermal resistance paths are

as follows:

•

The die junction-to-case (or top-of-die for exposed silicon) thermal resistance

•

The die junction-to-ball thermal resistance

Figure 26 depicts the primary heat transfer path for a package with an attached heat sink mounted to a printed-circuit

board.

Heat generated on the active side of the chip is conducted through the silicon, then through the heat sink attach

material (or thermal interface material), and finally to the heat sink where it is removed by forced-air convection.

Since the silicon thermal resistance is quite small, for a first-order analysis, the temperature drop in the silicon may

be neglected. Thus, the heat sink attach material and the heat sink conduction/convective thermal resistances are the

dominant terms.

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