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MB91F467BA bảng dữ liệu(PDF) 46 Page - Cypress Semiconductor

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MB91460B Series
Document Number: 002-04608 Rev. *A
Page 45 of 126
9.3.3
Address Mapping from CPU to Parallel Programming Mode
The following tables show the calculation from CPU addresses to flash macro addresses which are used in parallel programming.
9.3.3.1 Address Mapping MB91F467BA
Note: FA result is without 20:0000h offset for parallel Flash programming . Set offset by keeping FA[21] = 1 as described in section
“Parallel Flash programming mode
”.
9.3.3.2 Address Mapping MB91F466BA
Note: FA result is without 20:0000h offset for parallel Flash programming . Set offset by keeping FA[21] = 1 as described in section
“Parallel Flash programming mode
”.
CPU Address
(addr)
Condition
Flash
sectors
FA (Flash address) Calculation
14:0000h
to
14:FFFFh
addr[2]==0
SA0, SA2, SA4, SA6
(8 Kbyte)
FA := addr - addr%00:4000h + (addr%00:4000h)/2 - (addr/2)%4 +
addr%4 - 05:0000h
14:0000h
to
14:FFFFh
addr[2]==1
SA1, SA3, SA5, SA7
(8 Kbyte)
FA := addr - addr%00:4000h + (addr%00:4000h)/2 + 00:2000h -
(addr/2)%4 + addr%4 - 05:0000h
04:0000h
to
13:FFFFh
addr[2]==0
SA8, SA10, SA12, SA14, SA16,
SA18, SA20, SA22
(64 Kbyte)
FA := addr - addr%02:0000 + (addr%02:0000h)/2 - (addr/2)%4 +
addr%4 + 0C:0000h
04:0000h
to
13:FFFFh
addr[2]==1
SA9, SA11, SA13, SA15, SA17,
SA19, SA21, SA23
(64 Kbyte)
FA := addr - addr%02:0000h + (addr%02:0000h)/2 + 01:0000h -
(addr/2)%4 + addr%4 + 0C:0000h
CPU Address
(addr)
Condition
Flash
sectors
FA (Flash address) Calculation
14:0000h
to
14:FFFFh
addr[2]==0
SA0, SA2, SA4, SA6
(8 Kbyte)
FA := addr - addr%00:4000h + (addr%00:4000h)/2 - (addr/2)%4 +
addr%4 - 05:0000h
14:0000h
to
14:FFFFh
addr[2]==1
SA1, SA3, SA5, SA7
(8 Kbyte)
FA := addr - addr%00:4000h + (addr%00:4000h)/2 + 00:2000h - (ad-
dr/2)%4 + addr%4 - 05:0000h
04:0000h
to
0F:FFFFh
addr[2]==0
SA8, SA10, SA12, SA14, SA16,
SA18
(64 Kbyte)
FA := addr - addr%02:0000 + (addr%02:0000h)/2 - (addr/2)%4 + ad-
dr%4 + 0C:0000h
04:0000h
to
0F:FFFFh
addr[2]==1
SA9, SA11, SA13, SA15, SA17,
SA19
(64 Kbyte)
FA := addr - addr%02:0000h + (addr%02:0000h)/2 + 01:0000h - (ad-
dr/2)%4 + addr%4 + 0C:0000h



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