Frame 1 Two-Wire Slave Address Byte

(1)

Frame 2 Register Pointer Byte

1

Start By

Master

ACK By

INA231

ACK By

INA231

1

9

1

9

SDA

SCL

0

0

A3

A2

A1

A0

P7

P6

P5

P4

P3

P2

P1

P0

Stop

¼

Frame 1 SMBus ALERT Response Address Byte

Frame 2 Slave Address Byte

(1)

Start By

Master

ACK By

INA231

From

INA231

NACK By

Master

Stop By

Master

1

9

1

9

SDA

SCL

ALERT

0

0

0

1

1

0

0

1

0

0

A3

A2

A1

A0

0

Frame 1 Two-Wire Slave Address Byte

(1)

Frame 2 Data MSByte

(2)

1

Start By

Master

ACK By

INA231

ACK By

Master

From

INA231

1

9

1

9

SDA

SCL

0

0

A3

D15 D14

D13

D12

D11

D10

D9

D8

A2

A1

A0

Frame 3 Data LSByte

(2)

Stop

No ACK By

(3)

Master

From

INA231

1

9

D7

D6

D5

D4

D3

D2

D1

D0

Frame 1 Two-Wire Slave Address Byte

(1)

Frame 2 Register Pointer Byte

Start By

Master

ACK By

INA231

ACK By

INA231

1

9

1

ACK By

INA231

1

D15 D14

D13

D12

D11

D10

D9

D8

9

9

SDA

SCL

1

0

0

A3

A2

A1

A0

P7

P6

P5

P4

P3

P2

P1

P0

Frame 4 Data LSByte

Frame 3 Data MSByte

ACK By

INA231

Stop By

Master

1

D7

D6

D5

D4

D3

D2

D1

D0

9

20

INA231

SBOS644B – FEBRUARY 2013 – REVISED AUGUST 2017

www.ti.com

Product Folder Links: INA231

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Copyright © 2013–2017, Texas Instruments Incorporated

(1)

The value of the slave address byte is determined by the settings of the A0 and A1 pins. Refer to Table 2.

Figure 23. Timing Diagram for Write Word Format

(1)

The value of the slave address byte is determined by the settings of the A0 and A1 pins. Refer to Table 2.

(2)

Read data are from the last register pointer location. If a new register is desired, the register pointer must be updated.

See Figure 26.

(3)

ACK by Master can also be sent.

Figure 24. Timing Diagram for Read Word Format

Figure 25 shows the timing diagram for the SMBus alert response operation. Figure 26 illustrates a typical

register pointer configuration.

(1)

The slave address byte value is determined by the settings of the A0 and A1 pins. Refer to Table 2.

Figure 25. Timing Diagram for SMBus Alert

(1)

The slave address byte value is determined by the settings of the A0 and A1 pins. Refer to Table 2.

Figure 26. Typical Register Pointer Set