INA231AIYFDR datasheet(19/44 Pages) TI1

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INA231

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SBOS644B – FEBRUARY 2013 – REVISED AUGUST 2017

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8.5.5.1.2

Serial Interface

The INA231 operates only as a slave device on both the I2C bus and the SMBus. Connections to the bus are

made through the open-drain I/O lines, SDA and SCL. The SDA and SCL pins feature integrated spike-

suppression filters and Schmitt triggers to minimize the effects of input spikes and bus noise. Although there is

spike suppression integrated into the digital I/O lines, use proper layout to minimize the amount of coupling into

the communication lines. This noise introduction could occur from capacitively coupling signal edges between the

two communication lines themselves or from other switching noise sources present in the system. Routing traces

in parallel with ground in between layers on a printed circuit board (PCB) typically reduces the effects of coupling

between the communication lines. Shielding communication lines in general is recommended to reduce to

possibility of unintended noise coupling into the digital I/O lines that could be incorrectly interpreted as start or

stop commands.

The INA231 supports the transmission protocol for Fast (1 kHz to 400 kHz) and High-speed (1 kHz to 2.5 MHz)

modes. All data bytes are transmitted most significant byte first.

Accessing a specific register on the INA231 is accomplished by writing the appropriate value to the register

pointer. Refer to Table 3 for a complete list of registers and corresponding addresses. The value for the register

pointer (shown in Figure 26) is the first byte transferred after the slave address byte with the R/W bit low. Every

write operation to the INA231 requires a value for the register pointer.

Writing to a register begins with the first byte transmitted by the master. This byte is the slave address, with the

R/W bit low. The INA231 then acknowledges receipt of a valid address. The next byte transmitted by the master

is the address of the register that data are written to. This register address value updates the register pointer to

the desired register. The next two bytes are written to the register addressed by the register pointer. The INA231

acknowledges receipt of each data byte. The master may terminate data transfer by generating a start or stop

condition.

When reading from the INA231, the last value stored in the register pointer by a write operation determines

which register is read during a read operation. To change the register pointer for a read operation, a new value

must be written to the register pointer. This write is accomplished by issuing a slave address byte with the R/W

bit low, followed by the register pointer byte. No additional data are required. The master then generates a start

condition and sends the slave address byte with the R/W bit high to initiate the read command. The next byte is

transmitted by the slave and is the most significant byte of the register indicated by the register pointer. This byte

is followed by an ACK from the master; then the slave transmits the least significant byte. The master

acknowledges receipt of the data byte. The master may terminate data transfer by generating a Not-

Acknowledge bit (No ACK) after receiving any data byte, or generating a start or stop condition. If repeated reads

from the same register are desired, it is not necessary to continually send the register pointer bytes; the INA231

retains the register pointer value until it is changed by the next write operation.

Figure 23 and Figure 24 show the write and read operation timing diagrams, respectively. Note that register

bytes are sent most-significant byte first, followed by the least significant byte.

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