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ST25DV04K bảng dữ liệu(PDF) 20 Page - STMicroelectronics

tên linh kiện ST25DV04K
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Signal descriptions
ST25DV04K ST25DV16K ST25DV64K
20/220
DocID027603 Rev 4
2
Signal descriptions
2.1
Serial link (SCL, SDA)
2.1.1
Serial clock (SCL)
This input signal is used to strobe all data in and out of the ST25DVxxx. In applications
where this signal is used by slave devices to synchronize the bus to a slower clock, the bus
master must have an open drain output, and a pull-up resistor must be connected from
Serial Clock (SCL) to VCC. See Section 9.2 to know how to calculate the value of this pull-up
resistor
2.1.2
Serial data (SDA)
This bidirectional signal is used to transfer data in or out of the ST25DVxxx. It is an open
drain output that may be wire-OR’ed with other open drain or open collector signals on the
bus. A pull-up resistor must be connected from Serial Data (SDA) to VCC. (Figure 76
indicates how the value of the pull-up resistor can be calculated).
2.2
Power control (VCC, LPD,VSS)
2.2.1
Supply voltage (VCC)
This pin can be connected to an external DC supply voltage.
Note:
An internal voltage regulator allows the external voltage applied on VCC to supply the
ST25DVxxx, while preventing the internal power supply (rectified RF waveforms) to output a
DC voltage on the VCC pin.
2.2.2
Low Power Down (LPD)
This input signal is used to control an internal 1.8 V regulator delivering ST25DVxxx internal
supply. When LPD is high, this regulator is shut off and its consumption is reduced below
1µA. This regulator has a turn on time in range of 100us, to be added to the boot duration,
before the device becomes fully operational. This feature is only available on the 10-ball and
12-pin ST25DVxxx package.
2.2.3
Ground (VSS)
VSS is the reference for the VCC and VDCG supply voltages and V_EH analog output voltage.



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