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L9680 bảng dữ liệu(PDF) 147 Page - STMicroelectronics

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L9680
SPI interfaces
276
7.4
Remote sensor SPI register map
The Remote Sensor SPI interface consists of twelve 32-bit read registers (one for each
logical channel) to allow for access to decoded sensor data and fault registers. The registers
are addressed by the read register ID and the Global ID bit.
The L9680 checks the validity of the received RID field in the MOSI_RS frame. Should a SPI
read command be received containing an unused RID address, the command will be
discarded and the ERR_RID bit will be flagged in the current GSW.
Table 8. Remote sensor SPI register map
GID
RID / WID
Hex R/W
Name
Description
Operating State
Init Diag Safing Scrap Arming
0
1
0
1
0
0
0
0
$50
R
RSDR0
Remote
sensor
data/status
registers
(PSI-5 or
WSS)
0
1
0
1
0
0
0
1
$51
R
RSDR1
0
1
0
1
0
0
1
0
$52
R
RSDR2
0
1
0
1
0
0
1
1
$53
R
RSDR3
0
1
0
1
0
1
0
0
$54
R
RSDR4
0
1
0
1
0
1
0
1
$55
R
RSDR5
0
1
0
1
0
1
1
0
$56
R
RSDR6
0
1
0
1
0
1
1
1
$57
R
RSDR7
0
1
0
1
1
0
0
0
$58
R
RSDR8
0
1
0
1
1
0
0
1
$59
R
RSDR9
0
1
0
1
1
0
1
0
$5A
R
RSDR10
0
1
0
1
1
0
1
1
$5B
R
RSDR11
0
1
0
1
1
1
0
0 $5C
R
RSTHR0_L
Remote
sensor
(PSI-5 or
WSS)
0
1
0
1
1
1
0
1 $5D
R
RSTHR1_L
0
1
0
1
1
1
1
0
$5E
R
RSTHR2_L
0
1
0
1
1
1
1
1
$5F
R
RSTHR3_L
0
1
1
0
0
0
0
0
$60
R
RSTHR0_H
Remote
sensor current
2 registers
(WSS only)
0
1
1
0
0
0
0
1
$61
R
RSTHR1_H
0
1
1
0
0
0
1
0
$62
R
RSTHR2_H
0
1
1
0
0
0
1
1
$63
R
RSTHR3_H
0
1
1
0
1
0
1
0
$6A
R
ARM_STATE
Arming signals
status register
1
1
1
1
1
1
1
1
$FF
R
SAF_CC
Safing record
compare
complete
register



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