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TMS320VC5471GHKA bảng dữ liệu(PDF) 87 Page - Texas Instruments

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TMS320VC5471GHKA bảng dữ liệu(HTML) 87 Page - Texas Instruments

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Electrical Specifications
78
June 2001 – Revised December 2002
SPRS180C
6.14 MII Timings
Table 6–33 and Table 6–34 assume testing over recommended operating conditions (see Figure 6–33 and
Figure 6–34).
Table 6–33. MII Timing Requirements (Receive)
MIN†
MAX
UNIT
tsu(TCLKH-RXD)
Setup time, read RXD[3:0] before TCLK high
10/10
1
tsu(TCLKH-RXER) Setup time, read RX error valid before TCLK high
10/10
ns
1
tsu(TCLKH-RXDV) Setup time, read RX data valid before TCLK high
10/10
ns
thd(RXD-TCLKH)
Hold time, read RXD[3:0] after TCLK high
10/10
2
thd(RXER-TCLKH) Hold time, read RX error valid after TCLK high
10/10
ns
thd(RXDV-TCLKH) Hold time, read RX data valid after TCLK high
10/10
3
tw(TCLKH)
Pulse duration, TCLK high
140/14
ns
4
tw(TCLKL)
Pulse duration, TCLK low
140/14
ns
5
tw(TCLK)
Cycle time, TCLK
400/40
ns
† The timings format is based on 10 Mb/s / 100 Mb/s.
1
2
3
4
5
RCLK
RXD[3:0],
RXER,
RXDV
Figure 6–33. MII Receive Timing



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