TMS320VC5471GHKA datasheet(37/97 Pages) TI

tên linh kiện	TMS320VC5471GHKA

Giải thích chi tiết về linh kiện	Fixed-Point Digital Signal Processor

PDF	97 Pages

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DSP Subsystem Functional Overview

June 2001 – Revised December 2002

SPRS180C

The bits of the interrupt flag register (IFR) and interrupt mask register (IMR) are arranged as shown in

Figure 3–7. The function of each bit is described in Table 3–13.

Reserved

DMAC5

DMAC4

BXINT1/

DMAC3

BRINT1/

DMAC2

AINT

Reserved

DMAC1

DMAC0

BXINT0

BRINT0

TINT

Reserved

INT0

Figure 3–7. IFR and IMR Registers

Table 3–13. IFR and IMR Register Bit Fields

BIT

FUNCTION

NUMBER

NAME

FUNCTION

15–14

–

Reserved

DMAC5

DMA channel 5 interrupt flag/mask bit

DMAC4

DMA channel 4 interrupt flag/mask bit

BXINT1/DMAC3

McBSP1 transmit interrupt flag/mask bit

BRINT1/DMAC2

McBSP1 receive interrupt flag/mask bit

AINT

ARM-to-DSP interrupt flag/mask

–

Reserved

DMAC1

DMA channel 1 interrupt flag/mask bit

DMAC0

DMA channel 0 interrupt flag/mask bit

BXINT0

McBSP0 transmit interrupt flag/mask bit

BRINT0

McBSP0 receive interrupt flag/mask bit

TINT

Timer interrupt flag/mask bit

2–1

–

Reserved

INT0

External interrupt 0 flag/mask bit

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