6

KESTX01

For example, Ls=40nH, fo=433MHz, (Rs+Rr)=2.2

Ω,

Q=50, gives an equivalent parallel resistance of 5.4k

Ω.

Typically the antenna will be d.c. referenced to V

CC

as

shown in the applications diagram. The maximum voltage

swing across the antenna is therefore limited by the RF

saturation voltage of the output PA stage. This is of the order

of 0.5V and hence the peak to peak voltage across the

antenna will be 2*(V

CC

–0.5V) e.g. 9V for V

CC

=5V. This means

that the maximum current that can be driven into the load is

1.7mA (peak–peak at the fundamental) and the external

power control resistor should be set accordingly.

If it is necessary to drive more power into the antenna a

possible way to accomplish this is to perform an impedance

transformation to the antenna.

The antenna also acts as a filter for unwanted, out of band,

harmonic spurii. The use of a balanced output suppresses the

2nd harmonic (and other even order harmonics). The 3rd

harmonic of the fundamental is not automatically suppressed.

However even a Q as low as 10 will reduce the 3rd harmonic

by a further 32dB relative to the fundamental.

Figure 5 Loop antenna

Note: The above application diagram is provided to assist the customer in using the IC and no guarantee can be made as to

its correctness.

Figure 6 Application diagram

Rr

Rs

Lant

Ct

Rp

Lant

Ct

114

2

3

4

5

6

7

13

12

11

10

9

8

C2

R2

C3

VCC

X1

VEE2

C1

VCC

ANTENNA

ASK MODULATION

VCCPA

R1

POWER UP

VEE1

VEE1

C4

C5

L1

L2