V850ESLASHMA2 datasheet(74/226 Pages) NEC

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CHAPTER 5 INSTRUCTIONS

User’s Manual U14559EJ3V1UM

Divide halfword unsigned

DIVHU

Divide Halfword Unsigned

Instruction format

DIVHU reg1, reg2, reg3

Operation

GR [reg2]

← GR [reg2] ÷ GR [reg1]

GR [reg3]

← GR [reg2] % GR [reg1]

Format

Format XI

Opcode

rrrrr111111RRRRR

wwwww01010000010

Flag

–

1 if overflow occurs; otherwise, 0.

1 if the MSB of the word data of the operation result is 1; otherwise, 0.

1 if the result of an operation is 0; otherwise, 0.

SAT

–

Explanation

Divides the word data of general-purpose register reg2 by the lower halfword data of general-

purpose register reg1, and stores the quotient in general-purpose register reg2, and the

remainder in general-purpose register reg3. If the data is divided by 0, overflow occurs, and the

quotient is undefined. The data of general-purpose register reg1 is not affected.

Remark

Overflow occurs when data is divided by 0 (in which case the quotient is undefined).

If an interrupt occurs while this instruction is being executed, execution is aborted, and the

interrupt is serviced.

Upon returning from the interrupt, the execution is restarted from the

beginning, with the return address being the address of this instruction. Also, general-purpose

registers reg1 and reg2 will retain their original values prior to the start of execution.

If the address of reg2 is the same as the address of reg3, the remainder is stored in reg2

(= reg3).

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