AR0230CS datasheet(20/24 Pages) ONSEMI

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AR0230CS

www.onsemi.com

Table 17.

Line Interleaved HiSPi SLVS

Definition

Condition

Symbol

Voltage

Min

Typ

Max

Digital Operating Current

Streaming 1080p30

IDD

1.8

185

230

265

Analog Operating Current

Streaming 1080p30

IAA

2.8

Pixel Supply Current

Streaming 1080p30

IAA_PIX

2.8

3.3

PLL Supply Current

Streaming 1080p30

IDD_PLL

2.8

8.2

9.5

SLVS Supply Current

Streaming 1080p30

IDD_SLVS

0.4

Power (mW)

412.6

550.6

668.8

10. Operating currents are measured in mA at the following conditions:

− VAA = VAA_PIX = VDD_PLL =2.8 V

− VDD = VDD_IO= 1.8 V

− VDD_SLVS= 0.4 V

− PLL Enabled and PIXCLK = 74.25 MHz

− 4−lane HiSPi mode

− TA= 25

°C

Table 18.

Line Interleaved HiSPi HiVcm

Definition

Condition

Symbol

Voltage

Min

Typ

Max

Digital Operating Current

Streaming 1080p30

IDD

1.8

185

230

265

Analog Operating Current

Streaming 1080p30

IAA

2.8

Pixel Supply Current

Streaming 1080p30

IAA_PIX

2.8

3.3

PLL Supply Current

Streaming 1080p30

IDD_PLL

2.8

8.2

9.5

SLVS Supply Current

Streaming 1080p30

IDD_SLVS

1.8

Power (mW)

429.4

583

717.2

11. Operating currents are measured in mA at the following conditions:

− VAA = VAA_PIX = VDD_PLL = 2.8 V

− VDD= VDD_IO = 1.8 V

− VDD_SLVS = 1.8 V

− PLL Enabled and PIXCLK = 74.25 MHz

− 4−lane HiSPi mode

− TA= 25

°C

HiSPi Electrical Specifications

The ON Semiconductor AR0230CS sensor supports both

SLVS and HiVCM HiSPi modes. Refer to the High−Speed

Serial Pixel (HiSPi) Interface Physical Layer Specification

v2.00.00 for electrical definitions, specifications, and

timing information. The VDD_SLVS supply in this datasheet

corresponds to VDD_TX in the HiSPi Physical Layer

Specification. Similarly, VDD is equivalent to VDD_HiSPi as

referenced in the specification. The DLL as implemented on

AR0230CS is limited in the number of available delay steps

and differs from the HiSPi specification as described in this

section.

Table 19.

CHANNEL SKEW

(Measurement Conditions: _VDD_HiSPi = 1.8V;VDD_HiSPi_TX = 0.4V; Data Rate = 480 Mbps; DLL set to 0)

Data Lane Skew in Reference to Clock

tCHSKEW1PHY

−150

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