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WM8976 bảng dữ liệu(PDF) 67 Page - Wolfson Microelectronics plc

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Preliminary Technical Data
WM8976
w
PTD Rev 2.0 February 2005
67
The VMID_EN signal has an OR function performed with the normal VMID driver enable. If the
VMID_EN signal is to have no effect to normal functionality when jack detection is enabled, it should
set to 0 for both enables.
If jack detection is not enabled, the output enables default to all 1’s, allowing the outputs to be
controlled as normal via the normal output enables found in table 37, similarly the VMID_EN signal
defaults to 0 allowing the VMID driver to be controlled via the normal enable bit.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
5:4
JD_SEL
00
Pin selected as jack detection input
00 = GPIO1
01 = GPIO2
10 = Reserved
11 = Reserved
6
JD_EN
0
Jack Detection Enable
0=disabled
1=enabled
R9
GPIO control
8:7
JD_VMID
00
[7] VMID_EN_0
[8] VMID_EN_1
3:0
JD_EN0
0
Output enables when selected jack
detection input is logic 0.
[0]= OUT1_EN_0
[1]= OUT2_EN_0
[2]= OUT3_EN_0
[3]= OUT4_EN_0
R13
7:4
JD_EN1
0
Output enables when selected jack
detection input is logic 1
[4]= OUT1_EN_1
[5]= OUT2_EN_1
[6]= OUT3_EN_1
[7]= OUT4_EN_1
Table 56 Jack Detect Register Control Bits



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