TUSB546AI-DCI datasheet(23/49 Pages) TI1

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TUSB546A-DCI

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4. The TUSB546A-DCI acknowledges the sub-address cycle.

5. The master terminates the write operation by generating a stop condition (P).

NOTE

If no sub-addressing is included for the read procedure, and reads start at register offset

00h and continue byte by byte through the registers until the I2C master terminates the

read operation. If a I2C address write occurred prior to the read, then the reads start at the

sub-address specified by the address write.

Table 10. Register Legend

ACCESS TAG

NAME

MEANING

Read

The field may be read by software

Write

The field may be written by software

Set

The field may be set by a write of one. Writes of zeros to the field have no effect.

Clear

The field may be cleared by a write of one. Write of zero to the field have no effect.

Update

Hardware may autonomously update this field.

No Access

Not accessible or not applicable

TUSB546AI-DCI bảng dữ liệu(PDF) 23 Page - Texas Instruments