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TUSB546AI-DCI bảng dữ liệu(PDF) 20 Page - Texas Instruments

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TUSB546AI-DCI bảng dữ liệu(HTML) 20 Page - Texas Instruments

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TUSB546A-DCI
SLLSF14 – JUNE 2017
www.ti.com
Product Folder Links: TUSB546A-DCI
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
8.4.4 Linear EQ Configuration
Each of the TUSB546A-DCI receiver lanes has individual controls for receiver equalization. The receiver
equalization gain value can be controlled either through I2C registers or through GPIOs. Table 7 details the gain
value for each available combination when TUSB546A-DCI is in GPIO mode. These same options are also
available in I2C mode by updating registers DP0EQ_SEL, DP1EQ_SEL, DP2EQ_SEL, DP3EQ_SEL, EQ1_SEL,
EQ2_SEL, and SSEQ_SEL.
Table 7. TUSB546A-DCI Receiver Equalization GPIO Control
Equalization
Setting #
USB3.1 DOWNSTREAM FACING PORTS
USB 3.1 UPSTREAM FACING PORT
ALL DISPLAYPORT LANES
EQ1 PIN
LEVEL
EQ0 PIN LEVEL
EQ GAIN at
2.5 GHz
(dB)
SSEQ1 PIN
LEVEL
SSEQ0 PIN
LEVEL
EQ GAIN at 2.5
GHz (dB)
DPEQ1 PIN
LEVEL
DPEQ0 PIN
LEVEL
EQ GAIN at
4.05 GHz (dB)
0
0
0
0.2
0
0
-1.6
0
0
1.0
1
0
R
1.2
0
R
-0.5
0
R
3.3
2
0
F
2.2
0
F
0.5
0
F
4.9
3
0
1
3.3
0
1
1.6
0
1
6.5
4
R
0
4.2
R
0
2.4
R
0
7.5
5
R
R
5.1
R
R
3.4
R
R
8.6
6
R
F
5.9
R
F
4.1
R
F
9.5
7
R
1
6.7
R
1
4.9
R
1
10.4
8
F
0
7.4
F
0
5.7
F
0
11.1
9
F
R
8.1
F
R
6.4
F
R
11.7
10
F
F
8.7
F
F
6.9
F
F
12.3
11
F
1
9.3
F
1
7.5
F
1
12.8
12
1
0
9.7
1
0
8.0
1
0
13.2
13
1
R
10.2
1
R
8.5
1
R
13.6
14
1
F
10.6
1
F
8.9
1
F
14.0
15
1
1
11.1
1
1
9.4
1
1
14.4
8.4.5 USB3.1 Modes
The TUSB546A-DCI monitors the physical layer conditions like receiver termination, electrical idle, LFPS, and
SuperSpeed signaling rate to determine the state of the USB3.1 interface. Depending on the state of the USB
3.1 interface, the TUSB546A-DCI can be in one of four primary modes of operation when USB 3.1 is enabled
(CTL0 = H or CTLSEL0 = 1b1): Disconnect, U2/U3, U1, and U0.
The Disconnect mode is the state in which TUSB546A-DCI has not detected far-end termination on both
upstream facing port (UFP) or downstream facing port (DFP). The disconnect mode is the lowest power mode of
each of the four modes. The TUSB546A-DCI remains in this mode until far-end receiver termination has been
detected on both UFP and DFP. The TUSB546A-DCI immediately exits this mode and enter U0 once far-end
termination is detected.
Once in U0 mode, the TUSB546A-DCI will redrive all traffic received on UFP and DFP. U0 is the highest power
mode of all USB3.1 modes. The TUSB546A-DCI remains in U0 mode until electrical idle occurs on both UFP and
DFP. Upon detecting electrical idle, the TUSB546A-DCI immediately transitions to U1.
The U1 mode is the intermediate mode between U0 mode and U2/U3 mode. In U1 mode, the TUSB546A-DCI
UFP and DFP receiver termination remains enabled. The UFP and DFP transmitter DC common mode is
maintained. The power consumption in U1 is similar to power consumption of U0.
Next to the disconnect mode, the U2/U3 mode is next lowest power state. While in this mode, the TUSB546A-
DCI periodically performs far-end receiver detection. Anytime the far-end receiver termination is not detected on
either UFP or DFP, the TUSB546A-DCI leaves the U2/U3 mode and transitions to the Disconnect mode. It also
monitors for a valid LFPS. Upon detection of a valid LFPS, the TUSB546A-DCI immediately transitions to the U0
mode. In U2/U3 mode, the TUSB546A-DCI receiver terminations remain enabled but the TX DC common mode
voltage is not maintained.



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