TAS5755MDFDR datasheet(6/76 Pages) TI1

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TAS5755M

SLOS982 – AUGUST 2017

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Pin Functions (continued)

TYPE(1)

DESCRIPTION

NAME

NO.

VREG

Digital regulator output. Not to be used for powering external circuitry.

PowerPAD™

Connect to GND for best system performance. If not connected to GND, leave floating.

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum conditions for extended periods may affect device reliability.

(2)

5-V tolerant inputs are PDN, RESET, SCLK, LRCLK, MCLK, SDIN, SDA, and SCL.

(3)

Maximum pin voltage must not exceed 6 V.

(4)

DC voltage + peak ac waveform measured at the pin must be below the allowed limit for all conditions.

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

Supply

voltage

DVDD, AVDD

–0.3

4.2

PVDD_x

–0.3

Input voltage

3.3-V digital input

–0.5

DVDD + 0.5

5-V tolerant(2) digital input (except MCLK)

–0.5

DVDD + 2.5(3)

5-V tolerant MCLK input

–0.5

AVDD + 2.5(3)

OUT_x to PGND_x

32(4)

BST_x to PGND_x

39(4)

Input clamp current, IIK

–20

Output clamp current, IOK

–20

Operating free-air temperature

°C

Operating junction temperature

150

°C

Storage temperature, Tstg

–40

125

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

±1000

Charged-device model (CDM), per JEDEC specification JESD22-

C101(2)

±250

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