LAN91C100FD datasheet(16/68 Pages) SMSC

16 / 68 page

SMSC DS – LAN91C100FD REV. B

Page 16

Rev. 05/31/2000

DATA STRUCTURES AND REGISTERS

PACKET FORMAT IN BUFFER MEMORY

The packet format in memory is similar for the Transmit and Receive areas. The first word is reserved for the status word.

The next word is used to specify the total number of bytes, and it is followed by the data area. The data area holds the

packet itself.

FIGURE 4 - DATA PACKET FORMAT

TRANSMIT PACKET

RECEIVE PACKET

STATUS WORD

Written by CSMA upon transmit

completion (see Status Register)

Written by CSMA upon receive

completion (see RX Frame

Status Word)

BYTE COUNT

Written by CPU

Written by CSMA

DATA AREA

Written/modified by CPU

Written by CSMA

CONTROL BYTE

Written by CPU to control

odd/even data bytes

Written by CSMA; also has

odd/even bit

BYTE COUNT - Divided by two, it defines the total number of words including the STATUS WORD, the BYTE

COUNT WORD, the DATA AREA and the CONTROL BYTE.

The receive byte count always appears as even; the ODDFRM bit of the receive status word indicates if the low byte of the

last word is relevant.

The transmit byte count least significant bit will be assumed 0 by the controller regardless of the value written in memory.

DATA AREA - The data area starts at offset 4 of the packet structure and can extend up to 2043 bytes.

The data area contains six bytes of DESTINATION ADDRESS followed by six bytes of SOURCE ADDRESS, followed by a

variable-length number of bytes. On transmit, all bytes are provided by the CPU, including the source address. The

LAN91C100FD does not insert its own source address. On receive, all bytes are provided by the CSMA side.

bit15

bit0

RAM OFFSET

(decimal)

2046 max

STATUS

WORD

reserved

BYTE

COUNT

DATA AREA

CONTROL BYTE

LAST DATA BYTE if odd

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