IRCC datasheet(59/79 Pages) SMSC

tên linh kiện	IRCC

Giải thích chi tiết về linh kiện	INFRARED COMMUNICATIONS CONTROLLER

PDF	79 Pages

Scroll/Zoom	100%

nhà sản xuất	SMSC [SMSC Corporation]

Trang chủ	http://www.smsc.com

Logo

59 / 79 page

Receive Timing

Once enabled using the SCE Modes bits in Line

Control Register B, the IrDA-mode receiver

begins searching for valid FIR frames.

The

affects of non-valid IrDA infrared activity such as

out of spec pulse widths and invalid BOF

sequences are always reflected in the status

indicators in the IrCC registers. When a valid

BOF is detected, the EOM from the previous

message is disabled, errors are reset, and an

nActive Frame Interrupt is sent (Figure 26).

EOM and the EOM Interrupt are enabled

following an active FCS.

Framing errors or a FIFO overrun that occurs

before the Frame Check Sequence is complete

is indicated in the appropriate status register bits

and the message is aborted (Figure 27).

EOF

FCS

BOF

FIFO Empty

EOM Interrupt

Rx Enable

Active Frame

Active Frame Int.

EOM

FIGURE 26 - IrDA RX MESSAGE TIMING

BOF

FIFO Full

EOM Interrupt

Rx Enable

Active Frame

EOM

Active Frame Int.

Overrun Error

Abort Error

FIGURE 27 - IrDA FIR RX ABORT ON OVERRUN TIMING

IRCC bảng dữ liệu(PDF) 59 Page - SMSC Corporation